Lateral semiconductor device
First Claim
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1. A semiconductor device comprising:
- a semiconductor base of a first conductivity type having a major surface;
a first semiconductor region of a second conductivity type formed in the semiconductor base;
a second semiconductor region of the second conductivity type formed in the semiconductor base, the second semiconductor region separate from the first semiconductor region;
a third semiconductor region of the first conductivity type formed in the first semiconductor region;
a first main electrode which is formed on the major surface of the semiconductor base and electrically connected to the first and third semiconductor regions;
a second main electrode which is formed on the major surface of said semiconductor base and electrically connected to the second semiconductor region;
an insulating film formed on the major surface of the semiconductor base;
a gate electrode formed on said insulating film at least on the major surface of the semiconductor base and the first semiconductor region between the semiconductor base and the third semiconductor region; and
a fourth semiconductor region of the second conductivity type formed in the semiconductor base between the first and second semiconductor regions below an end region of the gate electrode, wherein the semiconductor device includes a lateral insulated-gate bipolar transistor having the semiconductor base as a base, the second semiconductor region as a collector, and the third semiconductor region as an emitter.
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Abstract
A semiconductor device including a semiconductor base, a first semiconductor region formed in the semiconductor base, a second semiconductor region formed in the semiconductor base, a third semiconductor region formed in the first semiconductor region, a first main electrode which is formed on the first and third semiconductor regions, a second main electrode which is formed on the second semiconductor region, an insulating film formed on the semiconductor base and first semiconductor region, and a gate electrode formed on the insulating film. The fourth semiconductor region is formed in the semiconductor base between the first and second semiconductor regions below an end region of the gate electrode.
56 Citations
14 Claims
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1. A semiconductor device comprising:
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a semiconductor base of a first conductivity type having a major surface;
a first semiconductor region of a second conductivity type formed in the semiconductor base;
a second semiconductor region of the second conductivity type formed in the semiconductor base, the second semiconductor region separate from the first semiconductor region;
a third semiconductor region of the first conductivity type formed in the first semiconductor region;
a first main electrode which is formed on the major surface of the semiconductor base and electrically connected to the first and third semiconductor regions;
a second main electrode which is formed on the major surface of said semiconductor base and electrically connected to the second semiconductor region;
an insulating film formed on the major surface of the semiconductor base;
a gate electrode formed on said insulating film at least on the major surface of the semiconductor base and the first semiconductor region between the semiconductor base and the third semiconductor region; and
a fourth semiconductor region of the second conductivity type formed in the semiconductor base between the first and second semiconductor regions below an end region of the gate electrode, wherein the semiconductor device includes a lateral insulated-gate bipolar transistor having the semiconductor base as a base, the second semiconductor region as a collector, and the third semiconductor region as an emitter. - View Dependent Claims (2, 3, 4, 5, 6, 13)
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7. A semiconductor device comprising:
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a semiconductor base of a first conductivity type having a major surface;
a first semiconductor region of a second conductivity type formed in the semiconductor base;
a second semiconductor region of the first conductivity type formed in the semiconductor base, the second semiconductor region separate from the first semiconductor region;
a third semiconductor region of the first conductivity type formed in the first semiconductor region;
a first main electrode which is formed on the major surface of the semiconductor base and electrically connected to the first and second semiconductor regions;
a second main electrode which is formed on the major surface of the semiconductor base and electrically connected to the second semiconductor region;
an insulating film formed on the major surface of the semiconductor base;
a gate electrode formed on the insulating film at least on the major surface of the semiconductor base and the first semiconductor region between the semiconductor base and the third semiconductor region; and
a fourth semiconductor region of the second conductivity type formed in the semiconductor base between the first and third semiconductor regions below an end region of the gate electrode, wherein the semiconductor device includes a lateral MOSFET having the semiconductor base and the second semiconductor region as a drain, the first semiconductor region as a back gate, and the third semiconductor region as a source. - View Dependent Claims (8, 9, 10, 11, 12, 14)
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Specification
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Current AssigneeKabushiki Kaisha Toshiba (Toshiba Corporation)
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Original AssigneeKabushiki Kaisha Toshiba (Toshiba Corporation)
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InventorsSuzuki, Fumito
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Primary Examiner(s)Pham, Long
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Assistant Examiner(s)Farahani, Dana
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Application NumberUS09/897,058Publication NumberTime in Patent Office1,001 DaysField of Search257/370, 257/371, 257/372, 257/378, 257/492, 257/491, 257/493, 257/495, 257/496, 257/344, 257/345, 257/346, 257/367, 257/404, 257/349, 257/350, 257/138, 257/347, 257/341US Class Current257/288CPC Class CodesH01L 29/0619 with a supplementary region...H01L 29/66325 controlled by field-effect,...H01L 29/7394 on an insulating layer or s...H01L 29/7824 with a substrate comprising...H01L 2924/00 Indexing scheme for arrange...H01L 2924/0002 Not covered by any one of g...
