Isolated photodiode

• US 6,713,796 B1
• Filed: 01/15/2002
• Issued: 03/30/2004
• Est. Priority Date: 01/19/2001
• Status: Active Grant

• Current Assignee: Teledyne Digital Imaging, Inc. (Teledyne Technologies Incorporated)
• Original Assignee: Dalsa Incorporated (Teledyne Technologies Incorporated)
• Inventors: Fox, Eric C.
• Primary Examiner(s): Tran, Minhloan
• Assistant Examiner(s): TRAN, TAN N
• Application Number:
  US10/044,974
• Time in Patent Office: 805 Days
• Field of Search: 257/222, 257/223, 257/225, 257/224, 257/233, 257/243, 257/229, 257/290, 257/291, 257/292, 257/232, 257/118, 257/257, 257/258, 257/461, 257/462, 438/75, 438/298, 438/312, 438/57, 438/22, 438/16, 438/70
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70

Abstract

A sensor formed in a substrate of a first conductivity type in a first concentration to express a first intrinsic potential includes CMOS circuitry to control the sensor, a first well of the first conductivity type in a second concentration (greater than the first concentration) formed in the substrate to express a second intrinsic potential, and a photodiode region of a second conductivity type formed in the first well. The first and second intrinsic potentials induce a field between the substrate and the first well that repels photo generated charge from drifting from the substrate into the first well. Alternatively, a sensor formed in a substrate of a first conductivity type includes CMOS circuitry to control the sensor, a first well of a second conductivity type formed in the substrate, a second well of the first conductivity type formed in the first well, and a photodiode region of the second conductivity type formed in the second well.

Claims

1. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor;

a first well of the first conductivity type in a second concentration formed in the substrate, the second concentration being greater than the first concentration;

a photodiode region of a second conductivity type formed in the first well; and

a pinning layer of the first conductivity type formed to a shallow depth in the photodiode region and electrically coupled to the substrate.

2. The sensor of claim 1, further comprising a gate electrode insulatively spaced over the first well and disposed to control a transfer of charge between the photodiode region and a predetermined region of the second conductivity type.

3. The sensor of claim 2, wherein the predetermined region of the second conductivity type is formed in the first well.

4. The sensor of claim 1, further comprising a gate electrode insulatively spaced over the substrate and disposed to control a transfer of charge between the photodiode region and a predetermined region of the second conductivity type.

5. The sensor of claim 4, further comprising a second well of the first conductivity type in the second concentration, wherein the predetermined region of the second conductivity type is formed in the second well.

6. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor;

a first well of the first conductivity type in a second concentration formed in the substrate, the second concentration being greater than the first concentration; and

a photodiode region of a second conductivity type formed in the first well,

wherein the CMOS circuitry includes a CMOS well of the first conductivity type and at least one FET formed in the CMOS well, and

wherein the CMOS well is formed to a lesser depth than a depth of the first well.

7. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor;

a first well of the first conductivity type in a second concentration formed in the substrate, the second concentration being greater than the first concentration; and

a photodiode region of a second conductivity type formed in the first well,

wherein the CMOS circuitry includes a CMOS well of the first conductivity type and at least one FET formed in the CMOS well, and

wherein the CMOS process type well is formed to a lesser concentration than the second concentration.

8. A sensor formed in a substrate of a first conductivity type comprising:

CMOS circuitry to control the sensor;

a first well of a second conductivity type formed in the substrate;

a second well of the first conductivity type formed in the first well; and

a photodiode region of the second conductivity type formed in the second well.

9. The sensor of claim 8, further comprising a pinning layer of the first conductivity type formed to a shallow depth in the photodiode region and electrically coupled to the substrate.

10. The sensor of claim 8, further comprising a gate electrode insulatively spaced over the second well and disposed to control a transfer of charge between the photodiode region and a predetermined region of the second conductivity type.

11. The sensor of claim 10, wherein the predetermined region of the second conductivity type is formed in the second well.

12. The sensor of claim 8, further comprising a bias circuit that applies a first potential to the first well and a second potential to the second well wherein the first and second potentials induce a field between the first and second wells that repels photo generated charge from drifting from the first well into the second well.

13. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor

an epi layer of the first conductivity type in a second concentration formed on the substrate, the second concentration being less than the first concentration;

a first well of the first conductivity type in a third concentration formed in the epi layer, the third concentration being greater than the second concentration; and

a photodiode region of a second conductivity type formed in the first well.

14. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor;

an epi layer of the first conductivity type in a second concentration, the second concentration being less than the first concentration;

a first well of a second conductivity type formed in the epi layer;

a second well of the first conductivity type formed in the first well; and

a photodiode region of the second conductivity type formed in the second well.

15. A sensor formed in a substrate of a first conductivity type in a first concentration comprising:

CMOS circuitry to control the sensor;

a first well of the first conductivity type in a second concentration formed in the substrate, the second concentration being greater than the first concentration;

a second well of the first conductivity type in the second concentration;

a predetermined region of the second conductivity type formed in the second well;

a gate electrode insulatively spaced over the substrate and disposed to control a transfer of charge between the photodiode region and the predetermined region; and

a photodiode region of a second conductivity type formed completely within the first well.

16. The sensor of claim 15, further comprising a pinning layer formed to a shallow depth in the photodiode region and electrically coupled to the substrate.