Method and apparatus for detecting flicker in an LCD image

• US 6,714,191 B2
• Filed: 09/19/2001
• Issued: 03/30/2004
• Est. Priority Date: 09/19/2001
• Status: Expired due to Fees

• Current Assignee: Tamiras Per Pte Ltd LLC (Intellectual Ventures LLC)
• Original Assignee: Genesis Microchip Inc. (STMicroelectronics NV)
• Inventors: Wu, Che Ming, Wang, Vincent, Soong, Jih Hsien
• Primary Examiner(s): Shankar, Vijay
• Assistant Examiner(s): Patel, Nitin
• Application Number:
  US09/957,663
• Publication Number:
  US 20030052853A1
• Time in Patent Office: 923 Days
• Field of Search: 348/446, 348/442, 345/103, 345/89, 345/88, 345/93, 345/419, 345/204, 345/214
• US Class Current: 345/204
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers

Abstract

A method, system and apparatus for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video signal source displayed on a liquid crystal display (LCD) unit is described. A two dimensional flicker pattern analysis is performed on a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first next sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second current sub-pixel.

Claims

1. A flicker pattern detector coupled to a video signal source suitable for detecting a sub-pixel pair susceptible to producing a flicker event in an image displayed on a liquid crystal display (LCD) unit, comprising:

a two dimensional flicker pattern analyzer arranged to perform a two dimensional flicker pattern analysis on a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second previous sub-pixel, wherein the two dimensional flicker pattern analyzer includes,

a first storage device suitable for storing the first plurality of sub-pixels,

a second storage device coupled to the first storage device suitably arranged to store the first current sub-pixel,

a third storage device arranged to store a the second current sub-pixel, and

a comparator unit coupled to the first storage device, the second storage device and the third storage device arranged to,

perform a two dimensional compare operation, and

update a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit.

2. A flicker pattern detector as recited in claim 1, wherein during the compare operation the comparator compares the first current sub-pixel to the first previous sub-pixel stored in the first storage device, the first current sub-pixel to the second current sub-pixel, the second current sub-pixel to the second previous sub-pixel received, and the second previous sub-pixel to the first previous sub-pixel.

3. A flicker pattern detector as recited in claim 1, further comprising:

a one dimensional flicker pattern analyzer arranged to perform a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline, wherein the one dimensional flicker pattern analyzer includes,

a fourth storage device suitable for storing the previous sub-pixel,

a second comparator unit coupled to the fourth storage device arranged to compare the previous sub-pixel and a current sub-pixel received in real time from the video signal source and based upon the compare, updates the final flicker frame score.

4. A detector as recited in claim 1, wherein the first storage device is a line buffer, wherein the second storage device is a first latch unit, and wherein the third storage device is a second latch unit.

5. A detector as recited in claim 3, wherein the fourth storage device is a flip flop unit.

6. A detector as recited in claim 4 further comprising a flicker event signal generator coupled to the first comparator and the second comparator arranged to receive the final flicker frame score.

7. A detector as recited in claim 4, further comprising a flicker correction circuit coupled to the flicker event signal generator.

8. A detector as recited in claim 7 wherein, based upon the final flicker frame score, the flicker event signal generator provides a flicker event signal to the flicker correction circuit which responds by flicker correction signal.

9. A method for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video signal source displayed on a liquid crystal display (LCD) unit, comprising:

performing a two dimensional flicker pattern analysis based upon a difference in Δ

transparency/Δ

voltage for selected sub-pixel pairs of a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second previous sub-pixel.

10. A method as recited in claim 9, further comprising:

storing the first plurality of sub-pixels in a first storage device;

storing the first current sub-pixel in a second storage device coupled to the first storage device;

storing the second current sub-pixel in a third storage device

comparing the first current sub-pixel to the first previous sub-pixel;

comparing the first current sub-pixel to the second current sub-pixel;

comparing the second current sub-pixel to the second previous sub-pixel;

comparing the second previous sub-pixel to the first previous sub-pixel; and

updating a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit.

11. A method as recited in claim 9, further comprising:

performing a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline.

12. A method as recited in claim 11, wherein the performing a one dimensional flicker pattern search comprises:

storing the previous sub-pixel;

comparing the previous sub-pixel and a current sub-pixel received in real time from the video signal source; and

updating the final flicker frame score based upon the comparing.

13. A method as recited in claim 12 further comprising a flicker event signal generator coupled to the first comparator and the second comparator arranged to receive the final flicker frame score.

14. A method as recited in claim 13, further comprising a flicker correction circuit coupled to the flicker event signal generator.

15. A method as recited in claim 14 wherein, based upon the final flicker frame score, the flicker event signal generator provides a flicker event signal to the flicker correction circuit which responds by flicker correction signal.

16. A method as recited in claim 9, wherein the first storage device is a line buffer, wherein the second storage device is a first latch unit, and wherein the third storage device is a second latch unit.

17. A method for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video source displayed on a LCD unit comprising:

performing a two dimensional flicker pattern analysis based upon a difference in Δ

transparency/Δ

voltage for selected sub-pixel pairs of a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frame line and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received in real time from the video signal source that includes a second current sub-pixel and a second previous sub-pixel.

18. Computer program product as recited in claim 17, further comprising:

computer code for storing the first plurality of sub-pixels in a first storage device;

computer code for storing the first current sub-pixel in a second storage device coupled to the first storage device;

computer code for storing the second current sub-pixel in a third storage device

computer code for comparing the first current sub-pixel to the first previous sub-pixel;

computer code for comparing the first current sub-pixel to the second current sub-pixel;

computer code for comparing the second current sub-pixel to the second previous sub-pixel;

computer code for comparing the second previous sub-pixel to the first previous sub-pixel; and

computer code for updating a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit.

19. A method as recited in claim 18, further comprising:

performing a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline.

20. A method as recited in claim 19, wherein the performing a one dimensional flicker pattern search comprises:

storing the previous sub-pixel;

comparing the previous sub-pixel and a current sub-pixel received in real time from the video signal source; and

updating the final flicker frame score based upon the comparing.

21. A method for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video signal source displayed on a liquid crystal display (LCD) unit, comprising:

performing a two dimensional flicker pattern analysis on a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second previous sub-pixel

storing the first plurality of sub-pixels in a first storage device;

storing the first current sub-pixel in a second storage device coupled to the first storage device;

storing the second current sub-pixel in a third storage device

comparing the first current sub-pixel to the first previous sub-pixel;

comparing the first current sub-pixel to the second current sub-pixel;

comparing the second current sub-pixel to the second previous sub-pixel;

comparing the second previous sub-pixel to the first previous sub-pixel; and

updating a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit.

22. A method as recited in claim 21, further comprising:

performing a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline.

23. A method as recited in claim 22, wherein the performing a one dimensional flicker pattern search comprises:

storing the previous sub-pixel;

comparing the previous sub-pixel and a current sub-pixel received in real time from the video signal source; and

updating the final flicker frame score based upon the comparing.

24. A method as recited in claim 21, wherein the first storage device is a line buffer, wherein the second storage device is a first latch unit, and wherein the third storage device is a second latch unit.

25. A method as recited in claim 24 further comprising a flicker event signal generator coupled to the first comparator and the second comparator arranged to receive the final flicker frame score.

26. A method as recited in claim 25, further comprising a flicker correction circuit coupled to the flicker event signal generator.

27. A method as recited in claim 26 wherein, based upon the final flicker frame score, the flicker event signal generator provides a flicker event signal to the flicker correction circuit which responds by flicker correction signal.

28. Computer program product for enabling a computer to perform a method for detecting a sub-pixel pair susceptible of producing a flicker event in an image from a video signal source displayed on a liquid crystal display (LCD) unit, comprising:

computer code for performing a two dimensional flicker pattern analysis on a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second previous sub-pixel;

computer code for storing the first plurality of sub-pixels in a first storage device;

computer code for storing the first current sub-pixel in a second storage device coupled to the first storage device;

computer code for storing the second current sub-pixel in a third storage device

computer code for comparing the first current sub-pixel to the first previous sub-pixel;

computer code for comparing the first current sub-pixel to the second current sub-pixel;

computer code for comparing the second current sub-pixel to the second previous sub-pixel;

computer code for comparing the second previous sub-pixel to the first previous sub-pixel;

computer code for updating a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit; and

computer readable medium for storing the computer code.

29. Computer program product as recited in claim 28, further comprising:

computer code for performing a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline.

30. Computer program product as recited in claim 29, wherein the performing a one dimensional flicker pattern search comprises:

storing the previous sub-pixel;

comparing the previous sub-pixel and a current sub-pixel received in real time from the video signal source; and

updating the final flicker frame score based upon the comparing.

31. Computer program product as recited in claim 28, wherein the first storage device is a line buffer, wherein the second storage device is a first latch unit, and wherein the third storage device is a second latch unit.

32. Computer program product as recited in claim 31 further comprising a flicker event signal generator coupled to the first comparator and the second comparator arranged to receive the final flicker frame score.

33. A flicker pattern detector coupled to a video signal source suitable for detecting a sub-pixel pair susceptible to producing a flicker event in an image displayed on a liquid crystal display (LCD) unit, comprising:

a two dimensional flicker pattern analyzer arranged to perform a two dimensional flicker pattern analysis based upon a difference in Δ

transparency/Δ

voltage for selected sub-pixel pairs of a selected group of sub-pixels some of which are included in a first plurality of sub-pixels that includes a first current sub-pixel and a first previous sub-pixel included in a first video frameline and a remainder of which are included in a second plurality of sub-pixels included in a second video frameline that is received, in real time, from the video signal source that includes a second current sub-pixel and a second previous sub-pixel.

34. A flicker pattern detector as recited in claim 33, further comprising:

a first storage device suitable for storing the first plurality of sub-pixels,

a second storage device coupled to the first storage device suitably arranged to store the first current sub-pixel,

a third storage device arranged to store a the second current sub-pixel, and

a comparator unit coupled to the first storage device, the second storage device and the third storage device arranged to,

perform a two dimensional compare operation, and

update a final flicker frame score based upon the compare operation indicative of the susceptibility of producing a flicker event in an image displayed on a liquid crystal display (LCD) unit.

35. A flicker pattern detector as recited in claim 33, wherein during the compare operation the comparator compares the first current sub-pixel to the first previous sub-pixel stored in the first storage device, the first current sub-pixel to the second current sub-pixel, the second current sub-pixel to the second previous sub-pixel received, and the second previous sub-pixel to the first previous sub-pixel.

36. A flicker pattern detector as recited in claim 33, further comprising:

a one dimensional flicker pattern analyzer arranged to perform a one dimensional flicker pattern analysis on a previous sub-pixel included in the first frameline and a current sub-pixel included in the second frameline, wherein the one dimensional flicker pattern analyzer includes,

a fourth storage device suitable for storing the previous sub-pixel,

a second comparator unit coupled to the fourth storage device arranged to compare the previous sub-pixel and a current sub-pixel received in real time from the video signal source and based upon the compare, updates the final flicker frame score.

37. A detector as recited in claim 36, wherein the fourth storage device is a flip flop unit.

38. A detector as recited in claim 33, wherein the first storage device is a line buffer, wherein the second storage device is a first latch unit, and wherein the third storage device is a second latch unit.

39. A detector as recited in claim 37 further comprising a flicker event signal generator coupled to the first comparator and the second comparator arranged to receive the final flicker frame score.

40. A detector as recited in claim 39, further comprising a flicker correction circuit coupled to the flicker event signal generator.

41. A detector as recited in claim 40 wherein, based upon the final flicker frame score, the flicker event signal generator provides a flicker event signal to the flicker correction circuit which responds by flicker correction signal.

42. A detector as recited in claim 41, further comprising a flicker correction circuit coupled to the flicker event signal generator.

43. A detector as recited in claim 42 wherein, based upon the final flicker frame score, the flicker event signal generator provides a flicker event signal to the flicker correction circuit which responds by flicker correction signal.