Integrated modem and line-isolation circuitry and associated method

• US 6,714,590 B1
• Filed: 01/10/2000
• Issued: 03/30/2004
• Est. Priority Date: 07/23/1999
• Status: Expired due to Fees

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Reid, Mitchell, Krone, Andrew W., Dupuis, Timothy J.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): MUNOZ, GUILLERMO
• Application Number:
  US09/480,058
• Time in Patent Office: 1,541 Days
• Field of Search: 375/222, 375/220, 375/257, 375/258, 375/377, 379/93, 455/403
• US Class Current: 375/222
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/4927 using levels matched to the quantisation levels of the channel
• CPC Class Codes: H04L 27/00 Modulated-carrier systems

Abstract

An improved modem architecture and associated method are disclosed that integrate modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit.

Claims

1. An integrated modem and line-isolation circuit, comprising:

a system-side line-isolation integrated circuit capable of being coupled to a capacitive isolation barrier to communicate digital information through the capacitive isolation barrier;

an asynchronous serial communication interface port capable of connecting to an external system-side integrated circuit, the asynchronous serial communication interface port included within the system-side line isolation integrated circuit; and

digital signal processing (DSP) circuitry included within the system-side line-isolation integrated circuit, the DSP circuitry having a modem processor for modem data and a digital processor for system-side circuitry,

wherein the system-side line-isolation circuit is configurable so that modem data from the modem processor or raw voice data from the digital processor may be selectively communicated through the asynchronous serial communication interface port; and

wherein the system-side circuitry is configurable to transfer data formatted with a synchronous modem transmission protocol through the asynchronous serial communication interface port.

2. The integrated modem and line-isolation circuit of claim 1, further comprising a line-side line-isolation integrated circuit, wherein the line-side line-isolation integrated circuit and the system-side line-isolation integrated circuit are capable of being coupled to the capacitive isolation barrier to communicate digital information with each other through the isolation barrier.

3. The integrated modem and line-isolation circuit of claim 2, wherein the system-side line-isolation integrated circuit and the line-side line-isolation integrated circuit provide phone-line direct-access-arrangement functionality.

4. The integrated modem and line-isolation circuit of claim 1, wherein the digital processor comprises digital filters for digital data received across the isolation barrier from a communication line and a digital modulator for digital data transmitted across the isolation barrier to the communication line.

5. The integrated modem and line-isolation circuit of claim 2, wherein the line-side line-isolation integrated circuit comprises digital-to-analog conversion circuitry for digital data received through the isolation barrier from the system-side line-isolation integrated circuit and analog-to-digital conversion circuitry for analog information received from the communication line.

6. The integrated modem and line-isolation circuit of claim 1, wherein the system-side line-isolation integrated circuit further comprises a plurality of user programmable input/output pins.

7. The integrated modem and line-isolation circuit of claim 1, wherein the raw data is pulse code modulated data.

8. The integrated modem and line-isolation circuit of claim 7, wherein the serial interface comprises at least one serial input pin for receiving PCM data and at least one serial output pin for sending PCM data.

9. The integrated modem and line-isolation circuit of claim 7, wherein the PCM data comprises M-bit PCM data evenly separated into a plurality of N-bit data words when M-bit PCM data is being communicated.

10. The integrated modem and line-isolation circuit of claim 9, wherein an X-bit control word is sent or received with each N-bit PCM data word and wherein the X-bit control words identify how the N-bit PCM data words are combined to form M-bit PCM data.

11. The integrated modem and line-isolation circuit of claim 1, further comprising:

an isolation interface within the system-side line-isolation integrated circuit, the isolation interface adapted to be coupled to the capacitive isolation barrier;

an analog input; and

path control circuitry coupled to the analog input, the isolation interface and the DSP circuitry, the path control circuitry having a control signal that determines flow of data between the analog input, the isolation interface and the DSP circuitry.

12. The integrated modem and line-isolation circuit of claim 11, further comprising an analog output coupled to the path control circuitry, the control signal determining the flow of data between the analog input, the analog output, the isolation interface and the DSP circuitry.

13. The integrated modem and line-isolation circuit of claim 11, wherein the control signal determines a data mode of operation such that data flows along a first path from the DSP circuitry to the isolation interface and along a second path from the isolation interface to the DSP circuitry.

14. The integrated modem and line-isolation circuit of claim 13, wherein the first and second paths are also connected to the analog output to provide analog monitoring of the data signals.

15. The integrated modem and line-isolation circuit of claim 1, further comprising:

selection circuitry coupled to an output from the modem processor and a separate data path; and

a control signal coupled to the selection circuitry, the control signal determining whether the output from the modem processor or the separate data path is output from the selection circuitry.

16. The integrated modem and line-isolation circuit of claim 15, wherein the modem processor receives pulse-code-modulated (PCM) data as an input, wherein the separate data path comprises PCM data, and wherein the selection circuitry outputs either modem data from the modem processor or PCM data from the separate data path depending upon the control signal.

17. The integrated modem and line-isolation circuit of claim 16, wherein the PCM data is received across the capacitive isolation barrier from a communication line.

18. The integrated modem and line-isolation circuit of claim 1, wherein the synchronous modem transmission protocol is an HDLC protocol.

19. A method for combining line-isolation and modem data processing, comprising:

providing a system-side line-isolation integrated circuit capable of transmitting digital data across a capacitive isolation barrier and capable of receiving digital data across the capacitive isolation barrier, the system-side line isolation integrated circuit including a digital-signal processor (DSP) having a modem processor;

processing the digital data transmitted or received across the capacitive isolation barrier with the digital signal processor within the system-side line-isolation integrated circuit;

also processing the digital data transmitted or received across the capacitive isolation barrier with the modem processor;

communicating through an asynchronous serial interface with an external integrated circuit to receive data to be sent across the capacitive isolation barrier to a communication line or to send data received across the capacitive isolation barrier from the communication line to the external integrated circuit;

selectively communicating modem data from the modem processor or raw data from a digital processor through the asynchronous serial interface; and

selectively configuring the system-side line isolation integrated circuit to transfer data of a synchronous modem transmission protocol through the asynchronous serial interface.

20. The method of claim 19, wherein the digital signal processor comprises digital filters for processing digital data received across the capacitive isolation barrier from a communication line and a digital modulator for processing digital data transmitted across the capacitive isolation barrier to the communication line.

21. The method of claim 19, further comprising providing a line-side line-isolation integrated circuit and communicating digital information between the line-side line-isolation integrated circuit and the system-side line-isolation integrated circuit through the capacitive isolation barrier.

22. The method of claim 21, wherein the system-side line-isolation integrated circuit and the line-side line-isolation integrated circuit provide phone-line direct-access-arrangement functionality.

23. The method of claim 21, further comprising converting analog information from a communication line to digital information before sending digital information across the capacitive isolation barrier and converting digital information received from the capacitive isolation barrier to analog information before sending analog information to the communication line.

24. The method of claim 19, further comprising:

providing isolation interface circuitry within the system-side line-isolation integrated circuit adapted to be coupled to the capacitive isolation barrier;

providing an analog input; and

controlling the flow of data between the analog input, the isolation interface circuitry and the DSP circuitry.

25. The method of claim 24, further comprising providing an analog output and wherein the controlling step comprises controlling the flow of data between the analog input, the analog output, the isolation interface and the DSP circuitry.

26. The method of claim 24, wherein the controlling step comprises allowing data to flow from the DSP circuitry to the isolation interface circuitry and from the isolation interface circuitry to the DSP to provide a data mode of operation.

27. The method of claim 19, further comprising:

selectively communicating modem data from the modem processor or raw data from a digital processor through the asynchronous serial interface.

28. The method of claim 27, wherein the raw data is pulse-code-modulated (PCM) data.

29. The method of claim 28, wherein the PCM data comprises M-bit PCM data separated into a plurality of data words when M-bit PCM data is being transmitted.

30. The method of claim 29, wherein the M-bit PCM data is separated evenly into a plurality of N-bit data words.

31. The method of claim 30, further comprising sending or receiving an X-bit control word along with each N-bit PCM data word, the X-bit control words identifying how the N-bit PCM data words are combined to form M-bit PCM data.

32. The method of claim 19, further comprising:

generating an output for the DSP circuitry by selecting either an output from the modem processor or a signal from a separate data path.

33. The method of claim 32, wherein the modem processor receives pulse-code-modulated (PCM) data as an input, wherein the separate data path comprises PCM data, and wherein the generating step selects either modem data from the modem processor or PCM data from the separate data path.

34. The method of claim 32, wherein the PCM data is received across the capacitive isolation barrier from a communication line.

35. The method of claim 19, wherein the synchronous modem transmission protocol is an HDLC protocol.

36. A combined modem and line-isolation system, comprising:

a line-side line-isolation integrated circuit;

a system-side line-isolation integrated circuit;

an asynchronous serial interface within the system-side line-isolation integrated circuit, the interface configured to communicate with external devices;

digital signal processing (DSP) circuitry included within the system-side line-isolation integrated circuit, the DSP circuitry having a modem processor for modem data and a digital processor for system-side circuitry; and

an isolation barrier comprising at least one isolation capacitor coupled between the line-side line-isolation integrated circuit and the system-side line-isolation integrated circuit;

wherein the line-side line-isolation integrated circuit and the system-side line-isolation integrated circuit communicate digital information with each other through the isolation barrier;

wherein the system-side line-isolation integrated circuit is configurable so that modem data from the modem processor or raw data from the digital processor may be selectively communicated through the asynchronous serial communication interface port; and

the system-side line-isolation integrated circuit is configurable to transfer data formatted with a synchronous modem transmission protocol through the asynchronous serial communication interface port.

37. The combined modem and line-isolation system of claim 36, wherein the isolation barrier consists of a plurality of capacitors.

38. The combined modem and line-isolation system of claim 36, wherein the system-side line-isolation integrated circuit and the line-side line-isolation integrated circuit provide phone-line direct-access-arrangement functionality.