Multi-microcomputer system

• US 6,715,068 B1
• Filed: 03/31/2000
• Issued: 03/30/2004
• Est. Priority Date: 03/31/1999
• Status: Expired due to Fees

• Current Assignee: Fuji Photo Optical Co. Ltd (Fujifilm Holdings Corporation)
• Original Assignee: Fuji Photo Optical Co. Ltd (Fujifilm Holdings Corporation)
• Inventors: Abe, Kazunori
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): CONNOLLY, MARK A
• Application Number:
  US09/540,899
• Time in Patent Office: 1,460 Days
• Field of Search: 713/1, 713/2, 370/305, 709/200
• US Class Current: 713/1
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57

Abstract

In an electronic endoscope adopting a two-microcomputer system, an operating program for the two microcomputers can be updated easily and with certainty, and the number of photocouplers for isolation can be reduced substantially. A patient-side circuit has a patient-side processing unit and a ROM installed in a socket. An IO-side circuit has an IO-side processing unit, a flash ROM and a RAM for storing a program-rewriting program transferred from the patient-side processing unit. The both processing units adopt a start-stop synchronization communication method and are connected to each other by two signal lines via signal conversion circuits and an isolation circuit. Upon updating a program in the microcomputer in the IO-side circuit, the patient-side processing unit reads the program-rewriting program and the update operating program from the ROM and transfers to the IO-side processing unit. The IO-side processing unit expands the program-rewriting program in the RAM and writes the update operating program in the flash ROM.

Claims

1. A multi-microcomputer system comprising a master microcomputer and a slave microcomputer, the multi-microcomputer system comprising:

in a master circuit having the master microcomputer therein, a socket for installing an update memory loaded with an update operating program, the master microcomputer comprising;

a master processing unit for judging whether or not the update operating program for the slave microcomputer is stored in the update memory when the update memory is installed in the socket and for transferring the update operating program to a slave circuit having the slave microcomputer therein in the case where the memory has been judged to store the update operating program, the slave microcomputer comprising;

a program memory for storing a current operating program; and

a slave processing unit for updating the current operating program with the update operating program when the update operating program is transferred.

2. A multi-microcomputer system as claimed in claim 1, wherein the slave processing unit transfers version information of the current operating program to the master processing unit and

the master processing unit reads version information of the update operating program from the update memory and judges whether the update operating program for the slave microcomputer is stored in the update memory by comparing the version information of the update operating program having been read with the version information of the current operating program having been transferred.

3. A multi-microcomputer system as claimed in claim 1 or 2, the update memory storing a program-rewriting program, the master processing unit reading the program-rewriting program from the update memory when the update memory is installed in the socket and transferring the program-rewriting program to the slave circuit, the slave microcomputer comprising an expansion memory for storing the program-rewriting program, and the master processing unit writing in the expansion memory the program-rewriting program having been transferred and updating the current operating program with the update operating program by using the program-rewriting program having been written in the expansion memory.

4. A multi-microcomputer system as claimed in any one of claims 1 to 3, further comprising:

a first signal conversion circuit for outputting parallel data input from the master processing unit to the slave circuit after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the slave circuit to the master processing unit after converting the signal from the slave circuit into parallel data; and

a second signal conversion circuit for outputting parallel data input from the slave processing unit to the master circuit after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the master circuit to the slave processing unit after converting the signal from the master circuit into parallel data.

5. A multi-microcomputer system as claimed in claim 4, wherein the first and the second signal conversion units are formed with asynchronous data transfer LSI'"'"'s having functions of parallel-serial conversion and serial-parallel conversion.

6. A multi-microcomputer system as claimed in claim 4 or 5, further comprising isolation means for electrically isolating the first signal conversion circuit from the second signal conversion circuit.

9. A multi-microcomputer system as claimed in any one of claims 6 to 8, wherein the master microcomputer is located in a scope-side circuit of an electronic endoscope having imaging means at the end thereof and the slave microcomputer is located in a circuit in the endoscope for interface with an apparatus externally connected to the endoscope.

7. A multi-microcomputer system comprising a master microcomputer and a slave computer, the multi-microcomputer system comprising:

a first signal conversion circuit for outputting parallel data input from the master microcomputer to the slave microcomputer after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the slave microcomputer to the master microcomputer after converting the signal from the slave microcomputer into parallel data;

a second signal conversion circuit for outputting parallel data input from the slave microcomputer to the master microcomputer after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the master microcomputer to the slave microcomputer after converting the signal from the master microcomputer into parallel data; and

isolation means for electrically isolating the first signal conversion circuit from the second signal conversion circuit.

8. A multi-microcomputer system as claimed in claim 7, wherein the first signal conversion circuit and the second signal conversion circuit comprise asynchronous data transfer LSI'"'"'s having functions of parallel-serial conversion and serial-parallel conversion.

10. A multi-microcomputer system comprising a master microcomputer and a slave microcomputer, the system comprising:

a signal level conversion circuit for outputting a signal output from a master circuit having the master microcomputer therein to an external apparatus after converting the signal into a signal of voltage level of the external apparatus and for outputting a signal input from the external apparatus to the master circuit after converting the signal from the external apparatus into a signal of a voltage level of the master circuit, the master microcomputer comprising;

a master processing unit for judging whether or not an update operating program is for the slave microcomputer when the program is transferred from the external apparatus via the signal level conversion circuit, and for transferring the update operating program to a slave circuit having the slave microcomputer therein in the case where the program has been judged to be for the slave microcomputer, and the slave microcomputer comprising;

a program memory storing a current operating program, and a slave processing unit for updating the current operating program with the update operating program when the update operating program is transferred.

11. A multi-microcomputer system as claimed in claim 10, wherein the slave processing unit transfers version information of the current operating program of the slave microcomputer to the master processing unit, and the master processing unit obtains version information of the update operating program and judges whether or not the update operating program is for the slave microcomputer by comparing the version information of the update operating program having been obtained with the version information of the current operating program having been transferred.

12. A multi-microcomputer system as claimed in claim 10 or 11, the master processing unit transferring a program-rewriting program to the slave circuit when the program-rewriting program is transferred via the signal level conversion circuit, the slave microcomputer comprising an expansion memory for storing the program-rewriting program, and the master processing unit writing in the expansion memory the program-rewriting program having been transferred and updating the current operating program with the update operating program by using the program-rewriting program having been written in the expansion memory.

13. A multi-microcomputer system as claimed in any one of claims 10 to 12, wherein the signal level conversion circuit carries out signal level conversion according to RS-232C standard.

14. A multi-microcomputer system as claimed in any one of claims 10 to 13, further comprising:

a first signal conversion circuit for outputting parallel data input from the master processing unit to the slave circuit after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the slave circuit to the master processing unit after converting the signal from the slave circuit into parallel data; and

a second signal conversion circuit for outputting parallel data input from the slave processing unit to the master circuit after converting the data into a start-stop synchronization signal and for outputting a start-stop synchronization signal input from the master circuit to the slave processing unit after converting the signal from the master circuit into parallel data.

15. A multi-microcomputer system as claimed in claim 14, wherein the first signal conversion circuit and the second signal conversion circuit are formed with asynchronous data transfer LSI'"'"'s having functions of parallel-serial conversion and serial-parallel conversion.

16. A multi-microcomputer system as claimed in any one of claims 10 to 15, further comprising isolation means for electrically isolating the master circuit from the slave circuit.

17. A multi-microcomputer system as claimed in claim 16, wherein the slave circuit is a scope-side circuit of an electronic endoscope having imaging means at the end thereof and the master circuit is a circuit in the endoscope for interface with an apparatus externally connected to the endoscope.