Semiconductor with a nitrided silicon gate oxide and method

• US 6,716,695 B1
• Filed: 12/20/2002
• Issued: 04/06/2004
• Est. Priority Date: 12/20/2002
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Mavoori, Jaideep, Khamankar, Rajesh B., Hu, Che-Jen, Hattangady, Sunil V.
• Primary Examiner(s): Pham, Long
• Application Number:
  US10/326,188
• Time in Patent Office: 473 Days
• Field of Search: 438/197, 438/240, 438/591, 438/585, 438/770, 438/775
• US Class Current: 438/240
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/28211 in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer H01L21/28194 and H01L21/28202 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A method of fabricating a transistor includes providing a semiconductor substrate having a surface and forming a nitride layer outwardly of the surface of the substrate. The nitride layer is oxidized to form a nitrided silicon oxide layer comprising an oxide layer beneath the nitride layer. A high-K layer is deposited outwardly of the nitride layer, and a conductive layer is formed outwardly of the high-K layer. The conductive layer, the high-K layer, and the nitrided silicon oxide layer are etched and patterned to form a gate stack. Sidewall spacers are formed outwardly of the semiconductor substrate adjacent to the gate stack, and source/drain regions are formed in the semiconductor substrate adjacent to the sidewall spacers.

Claims

1. A method of fabricating a transistor, comprising:

providing a semiconductor substrate having a surface;

forming a nitride layer outwardly of the surface of the substrate;

oxidizing the nitride layer to form a nitrided silicon oxide layer comprising an oxide layer beneath the nitride layer;

depositing a high-K layer outwardly of the nitride layer;

forming a conductive layer outwardly of the high-K layer;

patterning and etching the conductive layer, the high-K layer, and the nitrided silicon oxide layer to form a gate stack;

forming sidewall spacers outwardly of the semiconductor substrate adjacent to the gate stack; and

forming source/drain regions in the semiconductor substrate adjacent to the sidewall spacers.

2. The method of claim 1, wherein forming the nitride layer comprises subjecting the surface of the substrate to plasma nitridation.

3. The method of claim 1, wherein the thickness of the nitrided silicon oxide layer is less than about 20 Angstroms.

4. The method of claim 1, wherein the high-K dielectric layer comprises an oxygen-containing material.

5. The method of claim 1, wherein the high-K dielectric layer comprises a material selected from the group consisting of Ta₂O₅, BaTiO₃, TiO₂, CeO₂, and barium strontium titanate.

6. The method of claim 2, wherein the plasma nitridation comprises high density plasma nitridation.

7. The method of claim 2, wherein the plasma nitridation uses a nitrogen-containing precursor selected from the group consisting of N₂ or NH₃ or a mixture thereof with an inert gas.

8. The method of claim 1, wherein the oxidizing occurs at a temperature in the range of 600 to 1000°

C.

9. The method of claim 1, further comprising removing an oxide layer from the surface of the substrate before forming the nitride layer outwardly of the surface of the substrate.

10. A method of fabricating a transistor, comprising:

providing a semiconductor substrate having a surface;

forming a nitride layer outwardly of the surface of the substrate;

oxidizing the nitride layer to form a nitrided silicon oxide layer comprising an oxide layer beneath the nitride layer, wherein the thickness of the nitrided silicon oxide layer is less than about 20 Angstroms;

forming a conductive layer outwardly of the nitrided silicon oxide layer;

patterning and etching the conductive layer and the nitrided silicon oxide layer to form a gate stack;

forming sidewall spacers outwardly of the semiconductor substrate adjacent to the gate stack; and

forming source/drain regions in the semiconductor substrate adjacent to the sidewall spacers.

11. The method of claim 10, wherein forming the nitride layer comprises subjecting the surface of the substrate to plasma nitridation.

12. The method of claim 11, wherein said plasma nitridation comprises high density plasma nitridation.

13. The method of claim 11, wherein the plasma nitridation uses a nitrogen-containing precursor selected from the group consisting of N₂ or NH₃ or a mixture thereof with an inert gas.

14. The method of claim 10, further comprising removing an oxide layer from the surface of the substrate before forming the nitride layer outwardly of the surface of the substrate.

15. The method of claim 14, wherein removing an oxide layer from the surface of the substrate comprises stripping the surface of the substrate with hydrofluoric acid.