Memory structures

• US 6,717,215 B2
• Filed: 06/21/2001
• Issued: 04/06/2004
• Est. Priority Date: 06/21/2001
• Status: Expired due to Fees

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Koll, Andrew, Van Brocklin, Andrew L., Fricke, Peter
• Primary Examiner(s): Mai, Son L.
• Assistant Examiner(s): Nguyen, Dao H.
• Application Number:
  US10/177,240
• Publication Number:
  US 20040000678A1
• Time in Patent Office: 1,020 Days
• Field of Search: 257/347, 257/301, 257/306, 257/530, 438/240, 438/678
• US Class Current: 257/347
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: G11C 11/22 using ferroelectric elements
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: H01L 27/10 including a plurality of individual components in a repetitive configuration
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 63/20 comprising selection components having two electrodes, e.g. diodes
• CPC Class Codes: H10B 63/80 Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
• CPC Class Codes: H10B 63/84 arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
• CPC Class Codes: H10N 70/028 by conversion of electrode material, e.g. oxidation
• CPC Class Codes: H10N 70/20 Multistable switching devices, e.g. memristors
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/245 the species being metal cations, e.g. programmable metallization cells
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/883 Oxides or nitrides
• CPC Class Codes: H10N 70/884 based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883

Abstract

A memory structure that includes a first electrode, a second electrode, a thermal conduction limiting electrode having a thermal conductivity that is less than a thermal conductivity of the first electrode, a memory storage elementdisposed between the thermal conduction limiting electrode and the second electrode, and a control element disposed between the second electrode and the first electrode.

Claims

1. A memory structure comprising:

a first electrode;

a second electrode;

a thermal conduction limiting electrode having a thermal conductivity that is less than a thermal conductivity of the first electrode;

a memory storage element disposed between the thermal conduction limiting electrode and the second electrode; and

a control element disposed between the second electrode and the first electrode.

2. The memory structure of claim 1 wherein the thermal conduction limiting conductor comprises a material that is selected from the group consisting of titanium, tungsten and tantalum.

3. The memory structure of claim 1 wherein the second electrode includes a further thermal conduction limiting conductor having a thermal conductivity that is less than a thermal conductivity of the first electrode.

4. The memory structure of claim 1 wherein the second electrode includes a further thermal conduction limiting conductor comprising a material that is selected from the group consisting of titanium, tungsten and tantalum.

5. The memory structure of claim 1 wherein the second electrode comprises a conductive tubwell.

6. The memory structure of claim 1 wherein the second electrode comprises a thermal conduction limiting conductive tubwell.

7. The memory structure of claim 1 wherein the thermal conduction limiting electrode comprises a thin planar conductor.

8. The memory structure of claim 1 wherein the thermal conduction limiting electrode comprises a conductor having a generally serpentine cross-section.

9. The memory structure of claim 1 wherein the thermal conduction limiting electrode comprises a composite memory selection line that includes a thermal conduction limiting conductor.

10. The memory structure of claim 1 wherein the thermal conduction limiting electrode comprises a thermal conduction limiting conductive tubwell.

11. The memory structure of claim 1 wherein the memory storage element comprises an antifuse device.

12. The memory structure of claim 1 wherein the memory storage element comprises a tunnel junction device.

13. The memory structure of claim 1 wherein the memory storage element comprises either a silicide switch or a LeCombre switch device.

14. The memory structure of claim 1 wherein the memory storage element is selected from the group consisting of an antifuse, a fuse, a charge storage device, a resistive material, a trap-induced hysteresis material, a ferroelectric capacitor material, a Hall effect material, and a tunneling magneto-resistive material.

15. The memory structure of claim 1 wherein the memory storage element comprises an antifuse including material from the group consisting of an oxidized metal tunnel junction, a silicon dioxide tunnel junction, a dielectric-rupture, a polysilicon semiconductor, a polycrystalline semiconductor, an amorphous semiconductor, a microcrystalline semiconductor, a metal filament electro-migration semiconductor, and a polysilicon resistor semiconductor.

16. The memory structure of claim 1 wherein the memory storage element comprises a re-writable phase change material.

17. The memory structure of claim 1 wherein the control element comprises a tunnel junction device.

18. The memory structure of claim 1 wherein the control element comprises a diode.

19. The memory structure of claim 1 wherein the control element is selected from the group consisting of a recrystallized semiconductor, junction field effect transistor, a junction field effect transistor with its gate connected to its source or drain, a four-layer diode, an NPN transistor, and a PNP transistor.

20. An integrated circuit including the memory structure of claim 1.

21. An integrated circuit embedding the memory structure of claim 1.

22. A memory carrier including the memory structure of claim 1.

23. An electronic device capable of accepting the memory carrier of claim 22.

24. An electronic device including the memory structure of claim 1.

25. A memory structure comprising:

a first electrode;

a second electrode;

a thermal conduction limiting electrode having a thermal conductivity that is less than a thermal conductivity of the first electrode;

a tunnel junction memory storage element disposed between the thermal conduction limiting electrode and the second electrode; and

a tunnel junction control element disposed between the second electrode and the first electrode.

26. The memory structure of claim 25 wherein the thermal conduction limiting conductor comprises a material that is selected from the group consisting of titanium, tungsten and tantalum.

27. The memory structure of claim 25 wherein the second electrode includes a further thermal conduction limiting conductor having a thermal conductivity that is less than a thermal conductivity of the first electrode.

28. The memory structure of claim 25 wherein the second electrode includes a further thermal conduction limiting conductor comprising a material that is selected from the group consisting of titanium, tungsten and tantalum.

29. The memory structure of claim 25 wherein the second electrode comprises a conductive tubwell.

30. The memory structure of claim 25 wherein the second electrode comprises thermal conduction limiting conductive tubwell.

31. The memory structure of claim 25 wherein the thermal conduction limiting electrode comprises a thin planar conductor.

32. The memory structure of claim 25 wherein the thermal conduction limiting electrode comprises a conductor having a generally serpentine cross-section.

33. The memory structure of claim 25 wherein the thermal conduction limiting electrode comprises a composite memory selection line that includes a thermal conduction limiting conductor.

34. The memory structure of claim 25 wherein the thermal conduction limiting electrode comprises a thermal conduction limiting conductive tubwell.

35. An integrated circuit including the memory structure of claim 25.

36. An integrated circuit embedding the memory structure of claim 25.

37. A memory carrier including the memory structure of claim 25.

38. An electronic device configured to receive the memory carrier of claim 37.

39. An electronic device including the memory structure of claim 25.

40. A memory structure comprising:

a first electrode;

a second electrode;

means for electrically conducting and limiting thermal conduction;

a memory storage element disposed between said means for electrically conducting and the second electrode; and

a control element disposed between the second electrode and the first electrode.

41. A memory structure comprising:

a first electrode;

a thermal conduction limiting electrode; and

a memory storage element and a control element serially connected between the first electrode and the thermal conduction limiting electrode;

wherein the memory storage element is electrically connected to the control element by a second electrode.

42. A memory structure comprising:

a first electrode;

a second electrode;

a memory storage element electrically connected to the first electrode and the second electrode;

a control element electrically connected to the memory storage element by the second electrode; and

a thermal conduction limiting electrode electrically connected to the control element;

wherein the first electrode, the memory storage element, the second electrode, the control element and the thermal conduction limiting electrode are serially connected and wherein the second electrode is between the first electrode and the thermal conduction limiting electrode.

43. The memory structure of claim 42, wherein the first electrode comprises one of a row selection conductor line of a cross-point memory array or a column selection conductor line of a cross-point memory array.

44. The memory structure of claim 42, wherein the conduction limiting electrode comprises one of a row selection conductor line of a cross-point memory array or a column selection conductor line of a cross-point memory array.

45. The memory structure of claim 42, wherein the first electrode comprises one of a row selection conductor line of a cross-point memory array or a column selection conductor line of a cross-point memory array and the conduction limiting electrode comprises the other one of either the column selection conductor line of a cross-point memory array or the row selection conductor line of a cross-point memory array.

46. A memory structure comprising:

a first electrode;

a second electrode serially connected to the first electrode;

a thermal conduction limiting electrode having a thermal conductivity that is less than a thermal conductivity of the first electrode, the thermal conduction limiting electrode being serially connected with the first electrode and the second electrode, the second electrode being disposed between the first electrode and the thermal conduction limiting electrode;

a control element disposed between the first electrode and the second electrode; and

a memory storage element disposed between the second electrode and the thermal conduction limiting electrode.

47. A cross-point memory array comprising:

a plurality of row selection conductor lines;

a plurality of column selection conductor lines; and

a memory storage element electrically connected to a control element by an electrode, the memory storage element and the control element being serially connected between a thermal conduction limiting electrode and one of a first row selection conductor line or column selection conductor line.