Liquid crystal display device and method of manufacturing the same

• US 6,717,638 B1
• Filed: 11/15/2000
• Issued: 04/06/2004
• Est. Priority Date: 11/15/1999
• Status: Expired due to Term

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Kim, Woong-Kwon
• Primary Examiner(s): Chowdhury, T.
• Assistant Examiner(s): NGUYEN, HOAN C
• Application Number:
  US09/712,190
• Time in Patent Office: 1,238 Days
• Field of Search: 349/43, 349/106, 349/79
• US Class Current: 349/106
• CPC Class Codes: G02F 1/133514 Colour filters
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate

Abstract

A liquid crystal display (LCD) device having a color filter on a thin film transistor (TFT) structure (COT structure). The color filter layers are formed on the same substrate as the TFT to be in direct contact with the source and drain electrodes without any intermediaries therebetween. In particular, there is no need for a passivation layer between the TFT and the color filter layers. Preferred embodiments include a back etched type TFT that does not require a light shielding layer, an etch-stopped type TFT having an etch stop layer, and a coplanar type TFT having a light shielding layer below the gate electrode of the TFT.

Claims

1. A liquid crystal display (LCD) device comprising:

a substrate;

a gate electrode over the substrate;

a semiconductor layer aligned with the gate electrode;

an insulation layer between the gate electrode and the semiconductor layer;

a source electrode and a drain electrode electrically connected with the semiconductor layer;

a color filter layer, contacting the both the source and drain electrodes, wherein said contacting is only at a portion where said color filter layer is overlapping only edge portions of the source and the drain electrodes;

a planarization layer over the color filter layer and the source and the drain electrodes, the planarization layer having an opening exposing the drain electrode thereunder; and

a pixel electrode on the planarization layer and electrically connected with the drain electrode via the opening in the planarization layer.

2. The device of claim 1, wherein the color filter layer overlaps the source and drain electrodes enough to prevent light leakage.

3. The device of claim 1, wherein the color filter layer covers an end portion of at least the source electrode or the drain electrode.

4. The device of claim 1, wherein the semiconductor layer comprises:

a first layer on the insulation layer;

an etch stop layer on the first layer; and

a second layer over the first layer and the etch stop layer.

5. The device of claim 1, further comprising a light shielding layer below the gate electrode.

6. A method of forming liquid crystal display (LCD) device, the method comprising:

forming a substrate;

forming a gate electrode over the substrate;

forming an insulation layer on the gate electrode and the substrate;

forming a semiconductor layer, aligned relative to the gate electrode, on the insulating layer, the semiconductor layer having a pure semiconductor layer on the insulating layer and a doped semiconductor layer on the pure semiconductor layer;

forming a source electrode and a drain electrode electrically connected with the semiconductor layer;

forming a color filter layer, contacting the both the source and drain electrodes, wherein said contacting is only at a portion where said color filter layer is overlapping only edge portions of the source and the drain electrodes;

etching a portion of the doped semiconductor layer after forming the color filter layer;

forming a planarization layer over the color filter layer and the source and drain electrodes, the planarization layer having an opening exposing the drain electrode thereunder; and

forming a pixel electrode on the planarization layer and electrically connected with the drain electrode via the opening in the planarization layer.

7. The method of claim 6, wherein the color filter layer is formed to substantially cover the source and drain electrodes to prevent light leakage.

8. The method of claim 6, wherein the color filter layer is formed to cover an end portion of at least the source electrode or the drain electrode.

9. The method of claim 6, wherein forming the semiconductor layer comprises:

forming a first layer on the insulation layer;

forming an etch stop layer on the first layer; and

forming a second layer over the first layer and the etch stop layer.

10. The method of claim 6, further comprising a step of forming a light shielding layer below the gate electrode.

11. A liquid crystal display device comprising:

a thin film transistor (TFT) formed on a substrate, including a gate electrode, a source electrode, and a drain electrode;

a color filter layer, contacting both the source and drain electrodes, wherein said contacting is only at a portion where said color filter layer is overlapping only edge portions of the source and drain electrodes;

a planarization layer formed on the TFT and on the color filter; and

a pixel electrode formed on the planarization layer and electrically contacting the drain electrode.

12. The liquid crystal display device of claim 11, wherein the TFT further includes:

a gate insulating layer on the substrate and covering the gate electrode; and

a semiconductor layer formed on the gate insulating layer, having an amorphous silicon layer and a doped amorphous silicon layer,

wherein the gate electrode is formed on the substrate, while the source and drain electrodes are spaced apart from one another and overlap end portions of the doped amorphous silicon layer, respectively.

13. The liquid crystal display device of claim 12, wherein the TFT further includes an etch stopper formed on the silicon layer and between the source and drain electrodes.

14. The liquid crystal display device of claim 11, further comprising:

a light shielding layer formed between the substrate and the TFT; and

an insulating layer covering the light shielding layer.

15. The liquid crystal display device of claim 14, wherein the active layer is made of polysilicon.

16. The liquid crystal display device of claim 11, wherein the TFT further includes:

an active layer having source and drain regions at end portions;

a gate insulating layer on a central portion of the active layer, the gate electrode being formed on the gate insulating layer; and

an interlayer insulator formed entirely over the substrate, having a first and a second contact hole which respectively expose a portion of the source and drain regions therebelow,

wherein the source and drain electrodes are formed on the interlayer insulator to respectively contact the source and drain regions.

17. A method of manufacturing a liquid crystal display device, the method comprising:

providing a substrate;

forming a gate electrode on the substrate;

depositing sequentially a gate insulating layer, a pure semiconductor layer and a doped semiconductor layer over the substrate;

etching the pure semiconductor layer and the doped semiconductor layer to form an active layer;

forming a source electrode and a drain electrode on the active layer;

forming a color filter, the color filter, contacting the both the source and drain electrodes, said contacting being only at a portion where said color filter layer is overlapping only an edge portion of the source and drain electrodes;

etching a portion of the doped semiconductor layer between the source and drain electrodes to form a channel region of a resulting intermediate structure;

forming a planarization layer over the intermediate structure, the planarization layer including a drain contact hole to expose a portion of the drain electrode; and

forming a pixel electrode on the planarization layer, the pixel electrode electrically contacting the drain electrode via the drain contact hole.

18. A method of manufacturing a liquid crystal display device, the method comprising:

providing a substrate, the substrate including first and second regions;

forming a thin film transistor (TFT) on the first region of the substrate, the TFT having a gate electrode, an active layer, and source and drain electrodes;

forming a color filter on a second region of the substrate, the color filter, contacting both the source and drain electrodes, wherein said contacting is only at a portion where said color filter layer is overlapping only edge portions of the source and drain electrodes;

forming a planarization layer on the TFT and the color filter, the planarization layer including a drain contact hole to expose a portion of the drain electrode; and

forming a pixel electrode on the planarization layer, the pixel electrode electrically contacting the drain electrode via the drain contact hole.

19. The method of claim 18, wherein forming the TFT includes:

forming a gate electrode;

forming a gate insulating layer, the gate insulating layer covering the gate electrode;

depositing a semiconductor layer on the gate insulating layer;

patterning the semiconductor layer to form an active layer;

forming an etch stopper layer on the active layer;

depositing a doped semiconductor layer, the doped semiconductor layer covering the semiconductor layer and the etch stopper layer;

forming source and drain electrodes on the doped semiconductor layer; and

etching a portion of the doped semiconductor layer between the source and drain electrodes.

20. The method of claim 19, wherein the active layer is made of amorphous silicon.

21. The method of claim 18, further comprising:

forming a light shielding layer before forming the TFT; and

forming an insulating layer covering the light shielding layer.

22. The method of claim 18, wherein forming the TFT includes:

forming a semiconductor layer;

forming a gate insulating layer, a width of the gate insulating layer being smaller than that of the semiconductor layer;

forming a gate electrode on the gate insulating layer;

ion-doping an exposed portion of the semiconductor layer to define source and drain regions;

forming an inter layer insulator entirely over the substrate, the inter layer including a source region contact hole to expose a portion of the source electrode therebelow, and a drain region contact hole to expose a portion of the drain electrode therebelow; and

forming source and drain electrodes to be in electrical contact with the source and drain regions, respectively.

23. The method of claim 22, wherein the pure semiconductor layer is made of polysilicon.