Apparatus and system for real-time synthetic focus ultrasonic imaging

• US 6,719,693 B2
• Filed: 03/28/2003
• Issued: 04/13/2004
• Est. Priority Date: 03/29/2002
• Status: Expired due to Fees

• Current Assignee: BECS Technology, Inc.
• Original Assignee: BECS Technology, Inc.
• Inventors: Richard, William D.
• Primary Examiner(s): Imam, Ali M.
• Application Number:
  US10/402,537
• Publication Number:
  US 20030187357A1
• Time in Patent Office: 382 Days
• Field of Search: 600/407-472, 365/230.01, 365/233, 365/194, 365/230.03, 365/189.02, 710/305, 710/105, 736/20--33, 367/7, 367/11, 367/130, 367/138, 128/916
• US Class Current: 600/437
• CPC Class Codes: G01S 7/52025 for pulse systems G01S7/52034 takes precedence
• CPC Class Codes: G01S 7/52034 Data rate converters

Abstract

An apparatus for use in an ultrasonic imaging system adapted for generating synthetic focus images in real-time. The apparatus employs an integrated circuit architecture which is scalable and can be employed to construct real-time synthetic focus ultrasonic imaging systems having a large number of transducer array elements. The apparatus utilizes one field programmable gate array per image channel for data storage and sub-image generation. Each field programmable gate array includes on-chip block memories to store digitized ultrasonic signal return echo data and at least one block memory used to store data associated with each ultrasonic transmitter-receiver array pair. Logic inside the field programmable gate array calculates memory addresses during image generation to generate a time-of-flight surface and to form sub-images.

Claims

1. An improved ultrasonic imaging system having a plurality of transmitter/receiver array elements configured to propagate a pulse of ultrasonic energy towards the surface of a sample, and to receive a return echo, the improvement comprising:

a plurality of processing circuit sets, each of said plurality of processing circuit sets associated with one of the plurality of transmitter/receiver array elements;

wherein each of said plurality of processing circuit sets is configured to store a plurality of data values representative of a plurality of digitized ultrasonic return echoes received at an associated transmitter/receiver array element during discrete sample periods; and

wherein each of said plurality of processing circuit sets is further configured for parallel access to said stored plurality of data values during image generation.

2. The improved ultrasonic imaging system of claim 1 wherein each of said plurality of processing circuit sets includes a field programmable gate array.

3. The improved ultrasonic imaging system of claim 1 wherein each of said plurality of plurality of processing circuits includes an application specific integrated circuit.

4. The improved ultrasonic imaging system of claim 1 wherein each of said plurality of processing circuit sets includes at least one memory, said at least one memory configured to store data representative of a digitized ultrasonic return echo.

5. The improved ultrasonic imaging system of claim 4 wherein each of said plurality of plurality of processing circuit sets includes at least one time-of-flight calculator associated with said at least one memory, said time-of-flight calculator configured to calculate one or more internal memory addresses in said at least one memory.

6. The improved ultrasonic imaging system of claim 1 further including at least one summing circuit configured to receive input from each of said plurality of processing circuit sets representative of a component of an ultrasonic image pixel, and to generate an output representative of an ultrasonic image pixel.

7. The improved ultrasonic imaging system of claim 6 wherein said at least one summing circuit include one or more summing field programmable gate arrays.

8. The improved ultrasonic imaging system of claim 6 wherein said at least one summing circuit is configured to sequentially sum data from each of said plurality of processing circuits.

9. An ultrasonic image processing architecture including:

a plurality of ultrasonic transducers elements, each of said plurality of ultrasonic transducer elements including an ultrasonic transmitter and an ultrasonic receiver;

a plurality of analog-to-digital converters, each of said plurality of analog-to-digital converters operatively coupled to an associated ultrasonic transducer element in said plurality of ultrasonic transducer elements;

a plurality of image generation processors, each of said plurality of image generation processors having an input operatively coupled to an associated analog-to-digital converter in said plurality of analog-to-digital converters and an output; and

wherein each of said image generation processors further includes a memory configured to store a plurality of digitized image data sets received from said associated analog-to-digital converters, and a plurality of address generators configured to output memory address locations associated with each of said plurality of digitized image data sets.

10. The ultrasonic image processing architecture of claim 9 further including a summation network coupled to the output of each of said plurality of image generation processors, said summation network having an image pixel output.

11. The ultrasonic image processing architecture of claim 9 wherein each of said plurality of image generation processors is a field programmable gate array including a plurality of random access memory blocks configured to store digitized image data.

12. The ultrasonic image processing architecture of claim 9 wherein a first non-exclusive set of said plurality of image generation processors includes a second input;

wherein said output from each of a second non-exclusive set of said plurality of image generation processors is operatively connected to said second input of a next adjacent image generation processor of said first set;

wherein said output from a final image generation processor in said second set, having no next adjacent image generation processor, is an image pixel output;

wherein each of said plurality of image generator processors in said first non-exclusive set includes a summing component receiving input from said memory and from said second input, said summing component operatively coupled to said output.

13. A method for ultrasonic imaging of a sample material including the steps of:

propagating a pulse of ultrasonic energy towards the surface of the sample material from a single source;

receiving a plurality of return echoes at a plurality of points for a predetermined sample period;

digitizing each of said plurality of return echoes;

storing each of said digitized plurality of return echoes;

utilizing said stored digitized plurality of return echoes, together with at least one coefficient parameter, to generate a first ultrasonic image;

at least once, altering said at least one coefficient parameter and generating a second ultrasonic image utilizing said stored digitized plurality of return echoes together with said altered at least one coefficient parameter.

14. The method of claim 13 for generating an ultrasonic image wherein the step of altering said at least one coefficient parameter involves selectively altering said coefficient parameter to generate a second ultrasonic image which differs from said first ultrasonic image.

15. The method of claim 13 for generating an ultrasonic image wherein the step of altering said at least one coefficient parameter involves selectively altering said coefficient parameter to generate a second ultrasonic image having an altered focus from said first ultrasonic image.

16. The method of claim 13 for generating an ultrasonic image wherein the step of altering said at least one coefficient parameter involves selectively altering said coefficient parameter to generate a second ultrasonic image having an altered contrast from said first ultrasonic image.

17. The method of claim 13 for generating an ultrasonic image wherein said at least one coefficient parameter is a representation of a speed of sound.

18. The method of claim 17 for generating an ultrasonic image wherein the step of altering said at least one coefficient parameter involves selectively altering said coefficient parameter to identify a speed of sound at one or more pixel locations in said first ultrasonic image.

19. A method for generating an ultrasonic image of a sample material from an ultrasonic transducer array having a plurality of ultrasonic transmitter and receiver elements, including the steps of:

pulsing, in a predetermined sequence, each of said plurality of ultrasonic transmitter elements;

receiving, at each of said plurality of ultrasonic receiver elements, an ultrasonic return echo data set for each of said pulses;

storing each of said received ultrasonic return echo data sets in a memory associated each of said plurality of ultrasonic receiver elements;

extracting in parallel, from each stored received ultrasonic return echo data set, an image pixel component;

combining each of said extracted image pixel components to generate a single image pixel in the ultrasonic image; and

repeating the steps of extracting and combining for a complete set of image pixels in the ultrasonic image.

20. The method of claim 19 for generating an ultrasonic image wherein the step of extracting includes the step of identifying, using one or more coefficients, an address in said memory, said address identifying a storage location for data corresponding to a desired image pixel component.

21. The method of claim 20 wherein said one or more coefficients is a representation of the speed of sound in the sample material.

22. The method of claim 20 further including the steps of altering said one or more coefficients;

and repeating the steps of extracting and combining to generate at least one additional ultrasonic image.