System and method for converting a selected signal into a timing signal and inserting the phase of the timing signal into a framed signal

• US 6,721,896 B1
• Filed: 03/31/2000
• Issued: 04/13/2004
• Est. Priority Date: 03/31/2000
• Status: Expired due to Term

• Current Assignee: WSOU Investments, LLC (WSOU Holdings, LLC)
• Original Assignee: Alcatel SA (Nokia Corporation)
• Inventors: Teodorescu, Ioan V., Bond, John H.
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): CONNOLLY, MARK A
• Application Number:
  US09/539,362
• Time in Patent Office: 1,474 Days
• Field of Search: 713/500, 370/342, 370/335, 370/517, 370/503, 370/509, 370/512, 370/516, 331/2, 375/354
• US Class Current: 713/500
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation

Abstract

A system for generating a timing signal is disclosed. A processor generates a selection command. A clock receives a signal selected in response to the selection command and converts the selected signal to a timing signal. A framing module inserts a phase of the timing signal into a framed signal. A method for generating a timing signal for a telecommunication system is disclosed. A selection command is generated using a processor. A signal is selected in response to the selection command. The selected signal is converted to a timing signal using a clock. A phase of the timing signal is inserted into a framed signal using a framing module.

Claims

1. A system for generating a timing signal, the system comprising:

a processor operable to generate a selection command;

a clock operable to receive a signal selected in response to the selection command and to convert the selected signal to a timing signal; and

a framing module operable to insert a phase of the timing signal into a framed signal.

2. The system of claim 1, further comprising a selector operable to receive the selection command and to select the selected signal in response to the selection command.

3. The system of claim 1, further comprising a port operable to receive a signal and to monitor a status of the signal, the signal operable to be selected as the selected signal.

4. The system of claim 1, wherein the framed signal comprises a signal selection command operable to select a derived clock signal.

5. The system of claim 1, further comprising a sine wave port operable to receive a sine wave signal, the sine wave signal operable to be selected as the selected signal.

6. The system of claim 1, further comprising a composite clock port operable to receive a composite clock signal, the composite clock signal operable to be selected as the selected signal.

7. The system of claim 1, further comprising a derived clock port operable to receive a derived clock signal, the derived clock signal operable to be selected as the selected signal.

8. The system of claim 1, wherein the framing module is operable to receive a status signal comprising status information.

9. The system of claim 8, wherein the processor is operable to receive the status signal and to generate a new selection command in response to the status signal.

10. The system of claim 1, further comprising a test output operable to transmit timing signal for an external device.

11. The system of claim 1, further comprising a test output operable to output a test signal, the test signal operable to be used to test the system.

12. The system of claim 1, further comprising a tone bus port operable to receive a tone signal and to send the tone signal to the framing module.

13. The system of claim 1, wherein the clock comprises a stratum three clock.

14. The system of claim 1, wherein the processor is operable to receive an instruction from a control module.

15. The system of claim 1, wherein the processor is operable to generate a control signal, and the framing module is operable to insert the control signal into the framed signal.

16. A method for generating a timing signal for a telecommunication system, the method comprising:

generating a selection command using a processor;

selecting a signal in response to the selection command;

converting the selected signal to a timing signal using a clock; and

inserting a phase of the timing signal into a framed signal using a framing module.

17. The method of claim 16, wherein the step of selecting further comprises selecting the signal in response to the selection command using a selector.

18. The method of claim 16, wherein the framed signal comprises a signal selection command operable to select a derived clock signal.

19. The method of claim 16, further comprising receiving a sine wave signal, and selecting the sine wave signal as the selected signal.

20. The method of claim 16, further comprising receiving a composite clock signal, and selecting the composite clock signal asthe selected signal.

21. The method of claim 16, further comprising receiving a derived clock signal, and selecting the derived clock signal as the selected signal.

22. The method of claim 16, further comprising receiving a status signal comprising status information, and generating a new selection command in response to the status signal.

23. The method of claim 16, further comprising distributing the framed signal through a telecommunication system.

24. The method of claim 16, further comprising outputting a timing signal for an external device.

25. The method of claim 16, further comprising outputting a test signal, the test signal operable to be used to test the timing signal.

26. The method of claim 16, further comprising:

receiving a tone signal;

sending the tone signal to the framing module; and

inserting the tone signal into the framed signal.

27. The method of claim 16, further comprising transmitting an instruction from a control module to the processor.

28. The method of claim 16, further comprising:

generating a control signal; and

inserting the control signal into the framed signal.