Threshold detector for detecting synchronization signals at correlator output during packet acquisition

• US 6,724,834 B2
• Filed: 02/22/2002
• Issued: 04/20/2004
• Est. Priority Date: 02/22/2002
• Status: Expired due to Term

• Current Assignee: Intellectual Ventures I LLC (Intellectual Ventures LLC)
• Original Assignee: Conexant Incorporated (Synaptics Incorporated)
• Inventors: Baldwin, Keith R., Garrett, Albert L.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): Kim, Kevin
• Application Number:
  US10/081,045
• Publication Number:
  US 20030161428A1
• Time in Patent Office: 788 Days
• Field of Search: 375/137, 375/142, 375/143, 375/145, 375/149, 375/150, 375/152, 375/317, 375/343, 375/349
• US Class Current: 375/317
• CPC Class Codes: H04L 27/2662 Symbol synchronisation
• CPC Class Codes: H04L 27/2675 Pilot or known symbols
• CPC Class Codes: H04L 27/2695 with channel estimation, e.g. determination of delay spread, derivative or peak tracking channel estimation H04L25/0202
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

A threshold detector for detecting synchronization signals at correlator output during packet acquisition. An RF receiver converts RF signals into baseband signals. A matched filter correlator correlates samples of the baseband signals with predetermined synchronization signals, such as long sync symbols, and provides corresponding correlation samples. A long-term integrator integrates a first predetermined number of the correlation samples to provide a long term moving average and a short term integrator integrates a second predetermined number of the correlation samples to provide a short term moving average signal. The short term moving average signal is based on channel delay spread and the long term moving average tracks channel noise. A multiplier multiplies the long term moving average signal by a scale factor to generate a dynamic threshold. A detector detects a crossover between the short term moving average and the dynamic threshold to estimate timing of received synchronization signals.

Claims

1. A threshold detector for a wireless receiver configured to detect synchronization signals of packets transmitted in a wireless medium, comprising:

a correlator that compares received signals with predetermined synchronization signals and that provides a correlation signal indicative thereof;

a short-term integrator, coupled to the correlator, that integrates a predetermined short term of the correlated signal and that provides a short term moving average signal;

a long-term integrator, coupled to the correlator, that integrates a predetermined long term of the correlated signal and that provides a long term moving average signal;

a multiplier, coupled to the long-term integrator, that multiplies the long term moving average signal by a predetermined constant and that provides a corresponding dynamic threshold signal; and

a detector, coupled to the multiplier and the short-term integrator, that asserts a timing signal based on a crossover between the short term moving average signal and the dynamic threshold signal.

2. The threshold detector of claim 1, further comprising:

a phase remover, coupled at the output of the correlator, that removes phase of the correlation signal.

3. The threshold detector of claim 1, wherein:

the correlator outputs a consecutive series of samples at a selected sample rate of the received signal as the correlation signal;

the short-term integrator determines a moving average using a first predetermined number of samples based on a predetermined channel delay spread; and

the long-term integrator determines a moving average using a second predetermined number of samples, second predetermined number being greater than the first predetermined number and selected to track noise level in the channel.

4. The threshold detector of claim 3, wherein the first predetermined number is less than 10 and wherein the second predetermined number is greater than 20.

5. The threshold detector of claim 1, wherein the correlator is a matched filter correlator.

6. A baseband processor for a radio frequency (RF) communication device, comprising:

an analog to digital converter (ADC) that converts received analog baseband signals to digital baseband signals;

decimation filters, coupled to the ADC, that coverts the digital baseband signals to digital samples at a selected sample rate; and

a synchronization timing estimator, coupled to the decimation filters, comprising;

a correlator that compares the digital samples from the decimation filters with predetermined synchronization signals and that provides digital correlation samples indicative thereof;

a short-term integrator, coupled to the correlator, that integrates a first predetermined number of the digital correlation samples and that provides a short term moving average signal;

a long-term integrator, coupled to the correlator, that integrates a second predetermined number of the digital correlation samples and that provides a long term moving average signal, the second predetermined number greater than the first predetermined number;

a multiplier, coupled to the long-term integrator, that multiplies the long term moving average signal by a predetermined scale factor and that provides a corresponding dynamic threshold signal; and

a detector, coupled to the multiplier and the short-term integrator, that asserts a timing signal based on a crossover between the short term moving average signal and the dynamic threshold signal.

7. The baseband processor of claim 6, wherein the synchronization timing estimator further comprises a phase device coupled at the output of the correlator to remove phase of the digital correlation samples.

8. The baseband processor of claim 6, wherein the first predetermined number is based on a predetermined channel delay spread of a wireless medium and wherein the second predetermined number is selected to reflect average noise level in a wireless channel.

9. The baseband processor of claim 6, wherein the predetermined synchronization signals are long sync symbols of an orthogonal frequency division multiplexing (OFDM) packet.

10. The baseband processor of claim 9, further comprising:

automatic gain control (AGC) logic, couple to the ADC, that that controls a power level of the digital signals to a target power level;

acquisition control logic, coupled to the AGC logic, that asserts an AGC lock signal;

course frequency offset estimation logic, coupled to the acquisition control logic, the decimation filters and the synchronization timing estimator, that asserts a course frequency offset estimate signal; and

the synchronization timing estimator beginning processing upon assertion of the AGC lock signal and receiving the course frequency offset estimate signal.

11. A radio frequency (RF) transceiver configured for packet-based communication in which packets include pre-pended synchronization signals, comprising:

a radio section configured to convert RF signals at a selected communication frequency received by an antenna into corresponding analog baseband signals; and

a baseband processor, coupled to the radio, comprising;

an analog to digital converter (ADC) that converts the analog baseband signals to digital signals;

decimation filters, coupled to the ADC, that coverts the digital signals to digital samples at a selected sample rate; and

timing estimation logic, coupled to the decimation filters, comprising;

a correlator that compares the digital samples from the decimation filters with predetermined synchronization signals and that provides digital correlation samples indicative thereof;

a short-term integrator, coupled to the phase corrector, that sums a first predetermined number of phase-corrected digital correlation samples and that provides a short term moving average signal;

a long-term integrator, coupled to the phase corrector, that sums a second predetermined number of phase-corrected digital correlation samples and that provides a long term moving average signal, the second predetermined number greater than the first predetermined number;

a multiplier, coupled to the long-term integrator, that multiplies the long term moving average signal by a predetermined scale factor and that provides a corresponding dynamic threshold signal; and

a detector, coupled to the multiplier and the short-term integrator, that asserts a long sync timing signal based on a crossover between the short term moving average signal and the dynamic threshold signal.

12. The RF transceiver of claim 11, further comprising a phase remover, coupled to the correlator, that removes phase of the digital correlation samples.

13. The RF transceiver of claim 11, wherein the packet-based communication is compatible with orthogonal frequency division multiplexing (OFDM).

14. The RF transceiver of claim 11, further comprising:

the radio section converting RF signals to intermediate frequency (IF) signals and converting IF signals to the analog baseband signals;

the baseband processor further comprising;

automatic gain control (AGC) logic, coupled to the ADC, that controls a power level of the digital signals to a target power level; and

frequency offset logic, coupled to the decimation filters and the timing estimation logic, that estimates frequency offset of the digital samples.

15. A method of detecting synchronization signals of a packet transmitted in a multipath wireless medium, comprising:

correlating an incoming signal with predetermined synchronization signals and providing a correlation signal indicative thereof;

integrating the correlation signal over a predetermined short duration and providing a short-term moving average signal;

integrating the correlation signal over a predetermined long duration and providing a long-term moving average signal;

multiplying the long-term moving average signal by a scale factor and providing a corresponding dynamic threshold; and

detecting a cross-over event between the short-term moving average signal and the dynamic threshold and asserting a timing signal indicative thereof.

16. The method of claim 15, further comprising removing phase of the correlation signal.

17. The method of claim 15, further comprising:

generating discrete samples of the incoming signal at a predetermined sample rate;

said correlating comprising comparing the discrete samples with predetermined samples and providing correlation samples indicative thereof;

said integrating the correlation signal over a predetermined short duration comprising averaging a first predetermined number of correlation samples; and

said integrating the correlation signal over a predetermined long duration comprising averaging a second predetermined number of correlation samples, wherein the second predetermined number is greater than the first predetermined number.

18. The method of claim 17, wherein said generating discrete samples comprises converting an analog signal to a digital signal and sampling the digital signal at the predetermined sample rate.

19. The method of claim 17, wherein said comparing the discrete samples with predetermined samples comprises comparing the discrete samples with predetermined long sync symbols.

20. The method of claim 15, wherein the predetermined short duration is based on a predetermined multipath delay spread and wherein the predetermined long duration is selected to track noise in a wireless medium.