Bus architecture for high reliability communications in computer system

• US 6,725,312 B1
• Filed: 11/02/2000
• Issued: 04/20/2004
• Est. Priority Date: 11/02/2000
• Status: Active Grant

• Current Assignee: CML Versatel, Inc.
• Original Assignee: CML Versatel, Inc.
• Inventors: Biagé, Daniel
• Primary Examiner(s): Lefkowitz, Sumati
• Application Number:
  US09/703,789
• Time in Patent Office: 1,265 Days
• Field of Search: 710/305-317, 714/5-13, 370/216-228, 370/241-253, 379/219-221
• US Class Current: 710/305
• CPC Class Codes: G06F 11/2007 using redundant communication media

Abstract

An industrial PC-compatible computer system for telecommunications applications is described. The computer system includes a plurality of peripheral boards, each of which includes a peripheral processor. A computer telephony bus provides communications among the peripheral boards. The computer system also includes a plurality of system processors. A serial telecommunications bus arrangement provides communications between the plurality of peripheral boards and the plurality of system processors. The computer system arrangement providing for greater reliability in the event of a failure of a peripheral board, a system processor or of the communications therebetween.

Claims

1. An industrial PC-compatible computer system for telecommunications applications, the computer system comprising:

a plurality of peripheral boards, each peripheral board comprising a peripheral processor;

a computer telephony bus for providing communications among the peripheral boards;

a plurality of system processors; and

a serial telecommunications bus arrangement for providing communications between the plurality of peripheral boards and the plurality of system processors, having;

a plurality of telecommunications hubs, each hub being associated with a system processor;

a first serial telecommunications bus operably connected to each peripheral board and each telecommunications hub for providing communications therebetween; and

a second serial telecommunications bus operably connected to a telecommunications hub and its associated system processor for providing communications therebetween.

2. A computer system according to claim 1 the serial telecommunications bus arrangement further comprising a third serial telecommunications bus operably connected to a telecommunications hub and every other telecommunications hub for providing communications therebetween.

3. The computer system according to claim 1 wherein the computer system complies with the Compact PCI Specification.

4. The computer system according to claim 1 further comprising a chassis for containment of the peripheral boards.

5. The computer system according to claim 4 wherein the chassis also contains the system processors.

6. The computer system according to claim 1 wherein the computer telephony bus is an H.110 bus.

7. The computer system according to claim 1 wherein the serial telecommunications bus arrangement comprises Ethernet buses.

8. An industrial PC-compatible computer system for telecommunications applications, the computer system comprising:

a plurality of peripheral boards, each peripheral board including a peripheral processor;

an H.110 bus for providing communications among the peripheral boards;

a plurality of system processors;

a plurality of telecommunications hubs, each hub being associated with a system processor;

a first Ethernet bus operably connected to each peripheral board and each telecommunications hub for providing communications therebetween;

a second Ethernet bus operably connected to a telecommunications hub and its associated system processor for providing communications therebetween; and

a third Ethernet bus operably connected to a telecommunications hub and every other telecommunications hub for providing communications therebetween.

9. The computer according to claim 8 wherein the Ethernet bus follows the IEEE802.3X specification.

10. A bus architecture for providing communications in an industrial PC-compatible computer system for telecommunications applications, the computer system comprising a plurality of peripheral boards, each peripheral board comprising a peripheral processor, and a plurality of system processors, each of which has a telecommunications hub associated with it, the bus architecture comprising:

a computer telephony bus for providing communications among the plurality of peripheral boards; and

a serial telecommunications bus arrangement for providing

communications between the plurality of peripheral boards and the plurality of system processors, having;

a first serial telecommunications bus for providing communications between each of the peripheral boards and each of the telecommunications hubs; and

a second serial telecommunications bus for providing communications between each of the system processors and its associated hub.

11. A bus architecture according to claim 10 wherein the serial telecommunications bus arrangement further comprises a third serial

telecommunications bus between each of the telecommunications hubs and every other telecommunication hub.

12. A bus architecture according to claim 10 wherein the computer telephony bus is an H.100 bus.

13. A bus architecture according to claim 10 wherein the serial telecommunications bus is an Ethernet bus.

14. The bus architecture according to claim 13 wherein the Ethernet bus follows the IEEE802.3X protocol.