System and method for 32 bit code branching to 64 bit targets

• US 6,725,366 B1
• Filed: 09/07/2000
• Issued: 04/20/2004
• Est. Priority Date: 09/07/2000
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Swanberg, Randal Craig
• Primary Examiner(s): Coleman, Eric
• Application Number:
  US09/657,115
• Time in Patent Office: 1,321 Days
• Field of Search: 711/203, 711/220, 712/233
• US Class Current: 712/233
• CPC Class Codes: G06F 9/322 for non-sequential address
• CPC Class Codes: G06F 9/342 Extension of operand address space

Abstract

A system and method for converting 32 bit addresses into 64 bit addresses and enabling the 32 bit address to include a region index. The region index is stored in low order bits of the 32 bit address. In some architectures, namely the Intel IA-64 architecture, the low order bits are not used in entry point addresses because each entry point is on a 16 byte boundary. In the case of the IA-64 architecture, the low 4 bits of a 64 bit module entry point address are ignored. The region index in a 64 bit IA-64 address is stored in the high 3 bits of the address. Region index information is stored in the low order bits of the 32 bit address and copied to the high order bits for the corresponding 64 bit address. In this manner, the 32 bit address can include memory region index information without compromising the normal 4 gigabyte address space for a 32 bit address. By storing the memory index information, the 32 bit address is able to address a module entry point in any of the eight memory regions found in the IA-64 architecture. In addition, an additional bit in the 32 bit address is usable to further expand the addressable range of the 32 bit address when converted to operate in a 64 bit environment.

Claims

1. A computer implemented method of converting a 32 bit address into a 64 bit address, said method comprising:

copying one or more low order bits from the 32 bit address into one or more high order bits in the 64 bit address,

wherein the 32 bit address does not include the high order bits.

2. The method as described in claim 1 wherein the source location is the three lowest order bit addresses within the 32 bit address and the target location is the three highest order bit addresses within the 64 bit address.

3. The method as described in claim 1 further comprising:

processing an external call instruction within a 32 bit program;

locating an external module location corresponding to the external call instruction;

determining a memory region index corresponding to the external module location; and

storing the memory region index in the source location of the 32 bit address.

4. The method as described in claim 3 wherein the external call instruction corresponds to a shared external library.

5. The method as described in claim 3 wherein the external call instruction corresponds to a system call.

6. The method as described in claim 1 wherein the copying comprises executing a single assembler deposit instruction.

7. The method as described in claim 1 further comprising:

branching to the 64 bit address.

8. The method as described in claim 1 further comprising:

determining a region index;

storing the region index in the lowest three order bits of the 32 bit address;

copying the 32 bit address into the low 32 bits of the 64 bit address;

depositing the lowest order three bit values from the 32 bit address into the highest three order bit values in the 64 bit address; and

branching to the 64 bit address.

9. The method as described in claim 1 further comprising:

executing a 32 bit program;

invoking a run-time linker, the run time linker reading an external reference included in the 32 bit program;

loading a dynamic library corresponding with the external reference into a shared memory area;

processing an external call instruction included in the 32 bit program and corresponding with the dynamic library, the external call instruction including the 32 bit address;

determining a region index corresponding with the loaded dynamic library;

modifying the 32 bit address by storing the region index in the three low order bits of the 32 bit address;

passing control to an entry point corresponding to the 32 bit program;

converting the modified 32 bit address into the 64 bit address, the converting including depositing the three low order bits of the 32 bit address into the three high order bits of the 64 bit address; and

branching to the 64 bit address.

10. The method as described in claim 1 further comprising:

copying the 32 bit address into the low 32 bits of the 64 bit address;

depositing bit values from the indicator included in the 32 bit address into the indicator location included in the upper bits of the 64 bit address; and

branching to the 64 bit address.

11. An information handling system comprising:

one or more 64 bit processors;

a memory accessible by the processors, the memory including a plurality of regions;

a nonvolatile storage device accessible by the processors; and

a 32 bit program execution tool, the 32 bit program execution tool including;

means for copying one or more low order bits from the 32 bit address into one or more high order bits in the 64 bit address,

wherein the 32 bit address does not include the high order bits.

12. The information handling system as described in claim 11 wherein the source location is the three lowest order bit addresses within the 32 bit address and the target location is the three highest order bit addresses within the 64 bit address.

13. The information handling system as described in claim 11 wherein the 32 bit program execution tool further includes:

means for processing an external call instruction within a 32 bit program;

means for locating an external module location corresponding to the external call instruction;

means for determining a memory region index corresponding to the external module location; and

means for storing the memory region index in the source location of the 32 bit address.

14. The information handling system as described in claim 13 wherein the external call instruction corresponds to a shared external library.

15. The information handling system as described in claim 13 wherein the external call instruction corresponds to a system call.

16. The information handling system as described in claim 11 wherein the means for copying comprises means for executing a single assembler deposit instruction.

17. The information handling system as described in claim 11 wherein the 32 bit program execution tool further includes means for branching to the 64 bit address.

18. The information handling system as described in claim 11 wherein the 32 bit program execution tool further includes:

means for determining a region index;

means for storing the region index in the lowest three order bits of the 32 bit address;

means for copying the 32 bit address into the low 32 bits of the 64 bit address;

means for depositing the lowest order three bit values from the 32 bit address into the highest three order bit values in the 64 bit address; and

means for branching to the 64 bit address.

19. The information handling system as described in claim 11 wherein the 32 bit program execution tool further includes:

means for executing a 32 bit program;

means for invoking a run-time linker, the run time linker including means for reading an external reference included in the 32 bit program;

means for loading a dynamic library corresponding with the external reference into a shared memory area;

means for processing an external call instruction included in the 32 bit program and corresponding with the dynamic library, the external call instruction including the 32 bit address;

means for determining a region index corresponding with the loaded dynamic library;

means for modifying the 32 bit address by storing the region index in the three low order bits of the 32 bit address;

means for passing control to an entry point corresponding to the 32 bit program;

means for converting the modified 32 bit address into the 64 bit address, the converting including depositing the three low order bits of the 32 bit address into the three high order bits of the 64 bit address; and

means for branching to the 64 bit address.

20. A computer program product for converting a 32 bit address into a 64 bit address, said computer program product comprising:

means for copying one or more low order bits from the 32 bit address into one or more high order bits in the 64 bit address,

wherein the 32 bit address does not include the high order bits.

21. The computer program product as described in claim 20 wherein wherein the source location is the three lowest order bit addresses within the 32 bit address and the target location is the three highest order bit addresses within the 64 bit address.

22. The computer program product as described in claim 20 further comprising:

means for processing an external call instruction within a 32 bit program;

means for locating an external module location corresponding to the external call instruction;

means for determining a memory region index corresponding to the external module location; and

means for storing the memory region index in the source location of the 32 bit address.

23. The computer program product as described in claim 22 wherein the external call instruction corresponds to a shared external library.

24. The computer program product as described in claim 22 wherein the external call instruction corresponds to a system call.

25. The computer program product as described in claim 20 wherein the means for copying comprises means for executing a single assembler deposit instruction.

26. The computer program product as described in claim 20 further comprising:

means for branching to the 64 bit address.

27. The computer program product as described in claim 20 further comprising:

means for determining a region index;

means for storing the region index in the lowest three order bits of the 32 bit address;

means for copying the 32 bit address into the low 32 bits of the 64 bit address;

means for depositing the lowest order three bit values from the 32 bit address into the highest three order bit values in the 64 bit address; and

means for branching to the 64 bit address.

28. The computer program product as described in claim 20 further comprising:

means for executing a 32 bit program;

means for invoking a run-time linker, the run time linker including means for reading an external reference included in the 32 bit program;

means for loading a dynamic library corresponding with the external reference into a shared memory area;

means for processing an external call instruction included in the 32 bit program and corresponding with the dynamic library, the external call instruction including the 32 bit address;

means for determining a region index corresponding with the loaded dynamic library;

means for modifying the 32 bit address by storing the region index in the three low order bits of the 32 bit address;

means for passing control to an entry point corresponding to the 32 bit program;

means for converting the modified 32 bit address into the 64 bit address, the converting including depositing the three low order bits of the 32 bit address into the three high order bits of the 64 bit address; and

means for branching to the 64 bit address.

29. A computer implemented method of converting a 32 bit address into a 64 bit address, said method comprising:

determining an indicator within one or bits of the 32 bit address;

determining an indicator location within the upper 32 bits of the 64 bit address; and

copying the indicator to the indicator location.

30. The method as described in claim 29 wherein the indicator is a memory region index.

31. The method as described in claim 29 wherein the indicator location is in the three highest order bits included in the 64 bit address.

32. The method as described in claim 29 wherein the indicator is the three lowest order bits included in the 32 bit address.

33. The method as described in claim 29 further comprising:

processing an external call instruction within a 32 bit program;

locating an external module location corresponding to the external call instruction;

determining a memory region index corresponding to the external module location; and

storing the memory region index in the indicator.

34. The method as described in claim 33 wherein the external call instruction corresponds to a shared external library.

35. The method as described in claim 33 wherein the external call instruction corresponds to a system call.

36. The method as described in claim 29 wherein the copying comprises executing a single assembler deposit instruction.

37. The method as described in claim 29 further comprising:

branching to the 64 bit address.