RAID 1 read mirroring method for host adapters

• US 6,728,791 B1
• Filed: 01/16/2002
• Issued: 04/27/2004
• Est. Priority Date: 01/16/2002
• Status: Expired due to Term

• Current Assignee: PMC-Sierra Incorporated (Microchip Technology Incorporated)
• Original Assignee: Adaptec Incorporated (Steel Partners Holdings LP)
• Inventors: Young, B. Arlen
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): Nguyen, Tanh Q.
• Application Number:
  US10/051,960
• Time in Patent Office: 832 Days
• Field of Search: 710/1, 710/3, 710/4, 710/5, 710/7, 710/20, 710/21-24, 710/26, 710/28, 710/31, 710/36, 710/38, 710/62, 710/63, 710/64, 710/72-74, 711/100, 711/161, 711/162, 711/114, 711/200, 714/1, 714/6
• US Class Current: 710/5
• CPC Class Codes: G06F 11/2087 with a common controller

Abstract

A single host adapter hardware I/O control block contains information used to specify a transfer of data from a first target device to a host system and in addition information that specifies whether the data is mirrored, and if so, identifies a second target device on which the data is to be read. After transferring the single hardware I/O control block to the host adapter integrated circuit, the host adapter integrated circuit determines whether the hardware I/O control block specifies a mirrored transaction. If a mirrored transaction is specified, the host adapter integrated circuit generates a second hardware I/O control block for the second target device using the information in the first hardware I/O control block. When the execution of both hardware I/O control blocks is complete, the host adapter integrated circuit provides a single completion notification to the host system.

Claims

1. A method comprising:

receiving a single hardware I/O control block by a host adapter integrated circuit wherein said host adapter integrated circuit interfaces two I/O buses and further wherein said single hardware I/O control block specifies a read data transaction for a first data storage device; and

analyzing said single hardware I/O control block by said host adapter integrated circuit to determine whether information in said single hardware I/O control block specifies a mirrored read data transaction for a second data storage device.

2. The method of claim 1 wherein said analyzing said single hardware I/O control block further comprises:

determining, by said host adapter integrated circuit, whether an entry in a first mirror hardware I/O control block field of said single hardware I/O control block is valid.

3. The method of claim 2 further comprising:

generating, by said host adapter integrated circuit, a second hardware I/O control block upon determining said entry in said first mirror hardware I/O control block field is valid wherein said second hardware I/O control block specifies said mirrored read data transaction for said second data storage device.

4. The method of claim 3 further comprising:

executing said first hardware I/O control block and said second hardware I/O control block independently by said host adapter integrated circuit.

5. The method of claim 3 further comprising:

enabling an abort of execution of one of said first hardware I/O control block and said second hardware I/O control block upon start of execution of a different one of said first hardware I/O control block and said second hardware I/O control block wherein said different one is a first to start execution.

6. The method of claim 5 further comprising:

posting as complete only a last of said first and second hardware I/O control blocks to complete executing.

7. The method of claim 2 further comprising:

executing said first hardware I/O control block by said host adapter integrated circuit as a non-mirrored read data transaction upon determining said entry in said first mirror hardware I/O control block field is invalid.

8. A method comprising:

receiving a single hardware I/O control block by a host adapter integrated circuit wherein said single hardware I/O control block specifies a read data operation from a first data storage device and includes a sister hardware I/O control block field; and

generating another hardware I/O control block by said host adapter integrated circuit upon said sister hardware I/O control block field containing a valid hardware I/O control block identification number wherein said another hardware I/O control block specifies said read data operation for a second data storage device so that said read data transaction is mirrored.

9. The method of claim 8 wherein said valid hardware I/O control block identification number is a pointer to a storage site in an array of hardware I/O control block storage sites.

10. The method of claim 8 further comprising:

placing a hardware I/O control block identification number of said single hardware I/O control block in a sister hardware I/O control block field of said another hardware I/O control block.

11. The method of claim 8 wherein said another hardware I/O control block includes a sister hardware I/O control block field, and said method further comprises:

placing a null hardware I/O control block identification number in said sister hardware I/O control block field of said single hardware I/O control block upon completion of execution of said another hardware I/O control block prior to completion of execution of said single hardware I/O control block.

12. The method of claim 8 wherein said another hardware I/O control block includes a sister hardware I/O control block field, and said method further comprises:

placing a null hardware I/O control block identification number in said sister hardware I/O control block field of said another hardware I/O control block upon completion of execution of said single hardware I/O control block prior to completion of execution of said another hardware I/O control block.

13. The method of claim 8 further comprising:

reporting completion of execution of only one of said single hardware I/O control block and said another hardware I/O control block.

14. The method of claim 8 further comprising:

reporting completion of execution of said single hardware I/O control block only if said sister hardware I/O control block field of said single hardware I/O control block contains a predefined value.

15. The method of claim 8 further comprising:

reporting completion of execution of said another hardware I/O control block only if said sister hardware I/O control block field of said another hardware I/O control block contains a predefined value.

16. A method comprising:

receiving a single hardware I/O control block by a host adapter integrated circuit wherein said single hardware I/O control block specifies a read data operation for a first data storage device and includes a sister hardware I/O control block field;

generating another hardware I/O control block by said host adapter integrated circuit upon said sister hardware I/O control block field containing a valid hardware I/O control block identification number wherein said another hardware I/O control block specifies said read data operation for a second data storage device so that said read data transaction is mirrored;

placing a hardware I/O control block identification number of said single hardware I/O control block in a sister hardware I/O control block field of said another hardware I/O control block;

placing a null hardware I/O control block identification number in said sister hardware I/O control block field of one of said single hardware I/O control block and another hardware I/O control block upon completion of execution of a different one of said single hardware I/O control block and said another hardware I/O control block wherein said different one is a first to complete execution; and

reporting completion of execution of only one of said single hardware I/O control block and said another hardware I/O control block.

17. A structure comprising:

a memory containing processor instructions for a host adapter mirroring process, wherein upon execution of said processor instructions said host adapter mirroring process comprises;

receiving a single hardware I/O control block by a host adapter integrated circuit wherein said host adapter integrated circuit interfaces two I/O buses and further wherein said single hardware I/O control block specifies a read data transaction for a first data storage device; and

analyzing said single hardware I/O control block by said host adapter integrated circuit to determine whether information in said single hardware I/O control block specifies a mirrored read data transaction for a second data storage device.

18. A structure comprising:

a memory containing processor instructions for a host adapter mirroring process, wherein upon execution of said processor instructions said host adapter mirroring process comprises;

receiving a single hardware I/O control block by a host adapter integrated circuit wherein said single hardware I/O control block specifies a read data operation for a first data storage device and includes a sister hardware I/O control block field; and

generating another hardware I/O control block by said host adapter integrated circuit upon said sister hardware I/O control block field containing a valid hardware I/O control block identification number wherein said another hardware I/O control block specifies said read data operation for a second data storage device so that said read data transaction is mirrored.