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Interconnection architecture for managing multiple low bandwidth connections over a high bandwidth link

  • US 6,728,803 B1
  • Filed: 02/11/2000
  • Issued: 04/27/2004
  • Est. Priority Date: 03/30/1999
  • Status: Expired due to Fees
First Claim
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1. A data communication architecture comprising:

  • a plurality of devices having input/output (I/O) ports supporting communication at a first rate wherein the I/O ports of the plurality of devices support circuit switched communication;

    a data processor having a number of I/O ports where each I/O port supports communication at a second data rate, wherein the second data rate is at least double the first data rate and wherein the I/O ports of the data processor support packet switched communication;

    a communication link coupled to one of the data processor I/O ports and supporting the second data rate;

    a bridge device coupled to the communication link and to the I/O ports of the plurality of devices, the bridge device translating the communication link at the second data rate to a plurality of communication links at the first data rate.

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