Process for manufacturing semiconductor wafer and semiconductor wafer

• US 6,729,941 B2
• Filed: 12/10/2001
• Issued: 05/04/2004
• Est. Priority Date: 04/12/2000
• Status: Expired due to Term

• Current Assignee: Shin-Etsu Handotai Co., Ltd. (Shin-Etsu Chemical Company Limited)
• Original Assignee: Shin-Etsu Chemical Company Limited
• Inventors: Masumura, Hisashi, Hashimoto, Hiromasa, Ueno, Junichi
• Primary Examiner(s): Rose, Robert A.
• Application Number:
  US09/926,731
• Publication Number:
  US 20020137313A1
• Time in Patent Office: 876 Days
• Field of Search: 451/41, 451/28, 451/36, 451/37, 451/57, 438/691, 438/692, 438/693, 156/645.1
• US Class Current: 451/41
• CPC Class Codes: B24B 37/042 operating processes therefor
• CPC Class Codes: B24B 37/24 characterised by the composition or properties of the pad materials
• CPC Class Codes: B24D 3/28 Resins or natural or synthetic macromolecular compounds B24D3/22 takes precedence
• CPC Class Codes: H01L 21/02008 Multistep processes
• CPC Class Codes: H01L 21/02024 Mirror polishing

Abstract

The present invention provides a process for manufacturing a semiconductor wafer capable of effectively reducing unevenness having a wavelength of 0.5 mm or more which remains on a surface of the semiconductor wafer after a first polishing step and improving flatness thereof; and a semiconductor wafer manufactured by the manufacturing process. The manufacturing process comprises: plural polishing steps including a first polishing step and a final polishing step; and a corrective polishing step performed after the first polishing step using a polishing cloth harder than that used in the first polishing step.

Claims

1. A process for manufacturing a semiconductor wafer comprising:

plural polishing steps including a first polishing step and a final polishing step; and

a corrective polishing step performed after the first polishing step using a polishing cloth harder than that used in the first polishing step.

2. A process according to claim 1, wherein hardness of the polishing cloth used in the first polishing step is in the range of from 73 to 86 in Asker-C scale and hardness of the polishing cloth used in the corrective polishing cloth is in the range of from 80 to 98 in Asker C scale.

3. A process according to claim 1, wherein unevenness having a wavelength of 0.5 mm or more on a surface of the semiconductor wafer remaining after the first polishing step is reduced in the corrective polishing step.

4. A process according to claim 1, wherein the polishing cloth used in the corrective polishing step is a high hardness polishing cloth prepared by impregnating non-woven fabrics with urethane resins or a polishing cloth of chemical reaction foamed materials.

5. A process according to claim 1, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

6. A process according to claim 2, wherein unevenness having a wavelength of 0.5 mm or more on a surface of the semiconductor wafer remaining after the first polishing step is reduced in the corrective polishing step.

7. A process according to claim 2, wherein the polishing cloth used in the corrective polishing step is a high hardness polishing cloth prepared by impregnating non-woven fabrics with urethane resins or a polishing cloth of chemical reaction foamed materials.

8. A process according to claim 3, wherein the polishing cloth used in the corrective polishing step is a high hardness polishing cloth prepared by impregnating non-woven fabrics with urethane resins or a polishing cloth of chemical reaction foamed materials.

9. A process according to claim 6, wherein the polishing cloth used in the corrective polishing step is a high hardness polishing cloth prepared by impregnating non-woven fabrics with urethane resins or a polishing cloth of chemical reaction foamed materials.

10. A process according to claim 2, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

11. A process according to claim 3, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

12. A process according to claim 4, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

13. A process according to claim 6, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

14. A process according to claim 7, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

15. A process according to claim 8, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.

16. A process according to claim 9, wherein the plural polishing steps include the first polishing step, a second polishing step and the final polishing step, the corrective polishing step being added after the first polishing step.