Semiconductor device with spiral inductor and method for fabricating semiconductor integrated circuit device

• US 6,730,983 B2
• Filed: 09/24/2001
• Issued: 05/04/2004
• Est. Priority Date: 09/28/2000
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Minami, Yoshihiro
• Primary Examiner(s): Flynn, Nathan J.
• Assistant Examiner(s): MANDALA, VICTOR A
• Application Number:
  US09/960,333
• Publication Number:
  US 20020036335A1
• Time in Patent Office: 953 Days
• Field of Search: 257/532, 257/531, 257/534, 257/535, 257/621, 257/528, 257/701, 257/700, 438/329
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 41/042 by thin film techniques
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors

Abstract

A spiral inductor comprising: a substrate; a protruding portion which is formed on the top face of the substrate and the top of which serves as a dummy element for controlling a chemical mechanical polishing process; and a conductive layer which is formed on the substrate so as to have a spiral shape and which serves as an induction element, wherein the protruding portion is formed in a region other than a region directly below the conductive layer.

Claims

1. A semiconductor device comprising:

a substrate;

a plurality of protruding portions which are formed on the top face of the substrate; and

a conductive layer wiring which is formed on the substrate so as to have a spiral shape and which serve as an induction element,

wherein all of said protruding portions are formed only in a region other than a region directly below said conductive layer wiring.

2. A semiconductor device as set forth in claim 1, wherein the substrate is an SOI substrate, and

said protruding portions are formed of an SOI layer of said SOI substrate.

3. A semiconductor device as set forth in claim 2, wherein the substrate includes an N-type semiconductor layer.

4. A semiconductor device as set forth in claim 2, wherein the substrate includes a P-type semiconductor layer.

5. A semiconductor device comprising:

a substrate which has an inductor region;

a protruding portion which is formed on the top face of the substrate;

a conductive layer wiring which is formed in said inductor region on the substrate so as to have a spiral shape and which serves as an induction element; and

a protective film which is formed in said inductor region between the substrate and said conductive layer and prevents silicidation of said protruding portion in said inductor region.

6. A semiconductor device as set forth in claim 5, wherein the substrate is an SOI substrate, and

said protruding portion is formed of an SOI layer of said SOI substrate.

7. A semiconductor device as set forth in claim 6, which further comprises an extracting wiring which is connected to said conductive layer wiring.

8. A semiconductor device as set forth in claim 6, wherein the substrate includes an N-type semiconductor layer.

9. A semiconductor device as set forth in claim 6, wherein the substrate includes a P-type semiconductor layer.

10. A semiconductor device as set forth in claim 5, wherein said protruding portion is formed exclusively in a region other than a region directly below said conductive layer wiring.

11. A semiconductor device as set forth in claim 10, wherein the substrate is an SOI substrate, and

said protruding portion is formed of an SOI layer of said SOI substrate.

12. A semiconductor device as set forth in claim 11, which further comprises an extracting wiring which is connected to said conductive layer wiring.

13. A semiconductor device as set forth in claim 11, wherein the substrate includes an N-type semiconductor layer.

14. A semiconductor device as set forth in claim 11, wherein the substrate includes a P-type semiconductor layer.

15. A semiconductor device comprising:

a substrate;

a plurality of protruding portions which are formed on the top face of the substrate and each top of which serves as a dummy element for controlling a chemical mechanical polishing process; and

a conductive layer wiring which is formed on the substrate so as to have a spiral shape and which serves as an induction element,

wherein all of said protruding portions are formed only in a region other than a region directly below said conductive layer wiring.

16. A semiconductor device comprising:

a substrate which has an inductor region;

a protruding portion which is formed on the top face of the substrate;

a conductive layer wiring which is formed in said inductor region on the substrate so as to have a spiral shape and which serves as an induction element; and

a protective film which is formed only in said inductor region between the substrate and said conductive layer and prevents silicidation of said protruding portion in said inductor region.

17. A semiconductor device comprising:

a substrate which has a first region for an induction element and a second region for an active element;

a protruding portion which is formed on the top face of the substrate;

a conductive layer wiring which is formed in said first region on the substrate so as to have a spiral shape and which serves as an induction element; and

a protective film which is formed in said first region between the substrate and said conductive layer and prevents silicidation of said protruding portion in said first region during silicidation of the active element in said second region.