Non-volatile memory device and data storing method

• US 6,731,537 B2
• Filed: 02/26/2002
• Issued: 05/04/2004
• Est. Priority Date: 09/12/2001
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi ULSI Systems Company Limited (Hitachi, Ltd.), Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Kozakai, Kenji, Tamura, Takayuki, Kanamori, Motoki, Shikata, Atsushi, Asari, Shinsuke
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): PHAM, LY D
• Application Number:
  US10/082,310
• Publication Number:
  US 20030048659A1
• Time in Patent Office: 798 Days
• Field of Search: 365/185.08, 365/185.11, 365/189.04, 365/189.05, 365/189.12, 365/196, 365/230.03, 365/230.06, 365/230.08, 365/236, 365/239, 365/240
• US Class Current: 365/185.08
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 2207/229 Timing of a write operation

Abstract

In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.

Claims

1. A non-volatile storage device comprising;

a controller, a buffer memory, and a non-volatile memory,

wherein said buffer memory comprises a plurality of banks, and

wherein, in response to control information from an external unit, said controller stores first data, which is entered from the external unit, sequentially into the banks of said buffer memory and then further stores the stored data into a specified area of said non-volatile memory and, concurrently with the storage of data into said non-volatile memory, stores second data, which is entered from the external unit, into a bank of said buffer memory from which data has been transferred to said non-volatile memory;

a status register or a status flag indicating a completion/incompletion of the data transfer from said buffer memory to said non-volatile memory, the status register or status flag being controlled by said controller and indicating, for each bank, the completion/incompletion of the data transfer to said non-volatile memory;

a first register containing information on a bank into which data is being entered from the external unit; and

a second register containing information on a bank from which data is being transferred from said buffer memory to said non-volatile memory,

wherein said controller judges the completion/incompletion of the data transfer to or from each bank, based on the bank information in said first register and said second register, to control said status register or said status flag.

2. A non-volatile storage device comprising:

a controller, a buffer memory, and a non-volatile memory,

wherein said buffer memory comprises a plurality of banks, and

wherein, in response to control information from an external unit, said controller stores first data, which is entered from the external unit, sequentially into the banks of said buffer memory and then further stores the stored data into a specified area of said non-volatile memory and, concurrently with the storage of data into said non-volatile memory, stores second data, which is entered from the external unit, into a bank of said buffer memory from which data has been transferred to said non-volatile memory;

a status register or a status flag indicating a completion/incompletion of the data transfer from said buffer memory to said non-volatile memory, the status register or status flag being controlled by said controller and indicating, for each bank, the completion/incompletion of the data transfer to said non-volatile memory; and

a flag, for each bank, indicating whether or not the corresponding bank has data to be transferred to said non-volatile memory,

wherein said controller judges the completion/incompletion of the data transfer to or from each bank, based on the flag status, to control said status register or said status flag.