Serial bus diagnostic port of a digital system

• US 6,732,301 B1
• Filed: 03/06/2000
• Issued: 05/04/2004
• Est. Priority Date: 03/06/2000
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Landry, John A., Diehl, William W.
• Primary Examiner(s): LE, DIEU MINH T
• Application Number:
  US09/519,443
• Time in Patent Office: 1,520 Days
• Field of Search: 714/43, 714/56, 710/10, 710/11, 710/110, 710/305, 710/306, 710/307, 710/240
• US Class Current: 714/43
• CPC Class Codes: G06F 11/267 Reconfiguring circuits for testing, e.g. LSSD, partitioning

Abstract

A digital system provides a serial bus diagnostic port such as, for example, a universal serial bus (USB) diagnostic port. The USB diagnostic port can include a USB slave device operable to interface to a universal serial bus, a flash memory controller interface coupled to the USB slave device and operable to interface to a flash memory controller, and a test access port controller coupled to the USB slave device and operable to interface to a test access port. The diagnostic port can further include a system interface coupled to the USB slave device and operable to interface to an integrated controller independently of an operating system. Via the diagnostic port, a USB testing tool with testing software can access and debug internal logic of the digital system. As an alternative to a USB diagnostic port, the serial bus diagnostic port can be implemented in a variety of wired or wireless implementations such as, for example, an I.E.E.E. 1394 diagnostic port, an Ethernet diagnostic port, or a wireless Internet diagnostic port. Further, the serial bus diagnostic port can, for example, be used for software development, in-factory testing or in-field diagnostics of the digital system.

Claims

1. A universal serial bus (USB) diagnostic system environment, comprising:

a digital system operating under control of an operating system, the digital system comprising;

a flash memory controller;

internal logic;

a universal serial bus (USB) diagnostic port, comprising;

a universal serial bus (USB) slave device operable independently of the operating system to permit external interaction with the operating system to interface to a universal serial bus;

a flash memory controller interface coupled to the USB slave device and to the flash memory controller; and

a test access port controller coupled to a test access port and to the USB slave device;

a USB connector coupled to the slave device of the USB diagnostic port to provide external access to and from the USB diagnostic port;

a universal serial bus (USB) test tool coupled to the USB diagnostic port through a universal serial bus and the USB connector, the USB test tool comprising;

a universal serial bus (USB) master controller;

a universal serial bus (USB) port coupled to the USB master controller and via a universal serial bus to the USB connector; and

testing software operable to communicate with the USB diagnostic port via the USB connector under control by said master controller to access the flash memory controller interface and the test access port to perform flash memory and internal logic test and debug operations.

2. The USB diagnostic system environment of claim 1, the USB diagnostic port comprising:

a system interface coupled to the USB slave device and operable to interface to an integrated, controller of the digital system to permit test and debug operations by the testing software.

3. The digital system of claim 1, wherein the internal logic comprises processor registers.

4. A digital system operable under control of an operating system, comprising:

internal logic;

a flash memory controller;

a universal serial bus (USB) diagnostic port, comprising;

a universal serial bus (USB) slave device operable independently of the operating system to permit external interaction with the operating system;

a flash memory controller interface coupled to the USB slave device and to the flash memory controller; and

a test access port controller coupled to the USB slave device;

a test access port coupled to the test access port controller;

a USB connector interfacing with and providing external diagnostic access to and from the USB diagnostic port, said USB connector permitting interactive access under external control via said USB slave device to and from the flash memory controller and to and from the test access port controller.

5. The digital system of claim 4, including a USB master and an integrated controller coupled to a system I/O bus;

said USB diagnostic port including a system interface;

and wherein said system interface is coupled to the system I/O bus (120).

6. The digital system of claim 4, wherein the USB connector can be connected selectively to the USB diagnostic port or to the USB master.

7. The digital system of claim 6, wherein the USB slave device is operable to connect the USB connector to the USB diagnostic port after a system reset.

8. The digital system of claim 4, the USB diagnostic port comprising:

a system interface coupled to the USB slave device and to the system I/O bus and operable to interface to an integrated controller.

9. The digital system of claim 4, wherein the system interface operates independently of the operating system to permit external test and debug communication with the internal logic via said USB connector.

10. The digital system of claim 4, wherein the flash memory controller interface interfaces to the flash memory controller for flash memory programming through the USB slave device.

11. The digital system of claim 4, the test access port controller comprising:

a Joint Test Action Group (JTAG) controller operable to interface to processor registers through a JTAG port.

12. The digital system of claim 4, the test access port controller comprising:

a Joint Test Action Group (JTAG) controller operable to interface to logic in the digital system through a JTAG port.

13. A digital system operable under control of an operating system, comprising:

internal logic;

a controller coupled to a system I/O bus and to a USB master;

a flash memory controller;

a universal serial bus (USB) diagnostic port, comprising;

a universal serial bus (USB) slave device interfacing with a USB connector, said slave device operable independently of the operating system to permit external test and debug interaction with the operating system;

a flash memory controller interface coupled to the USB slave device and to the flash memory controller to permit externally controlled interactive flash memory test and debug access via said USB connector; and

a test access port controller coupled to the USB slave device and to a test access port, to permit external test and debug access of said internal logic via said USB connector.

14. The digital system of claim 13, wherein the USB diagnostic port also includes a further test access port coupled to the USB slave device to permit external test and debug access of process registers in the digital system.

15. The digital system of claim 13, including a USB master and a controller coupled to a system I/O bus;

said USB diagnostic port including a system interface; and

wherein said system interface is coupled to the system I/0 bus to permit external test and debug access from said USB connector to said internal logic independently of the operating system.

16. The digital system of claim 14, wherein the USB connector can be connected selectively to the USB diagnostic port or to the USB master and the USB slave device is operable to connect the USB connector to the USB diagnostic port after a system reset.

17. A digital system, comprising

internal logic;

a flash memory controller;

a serial bus coupled to a serial bus connector;

and a serial bus diagnostic port comprising;

a serial bus node coupled to said serial bus connector to permit transfer of data to and from said serial bus;

said serial bus node coupled to a master internal logic interface providing interface coupling to said flash memory controller and said internal logic and a test access port controller;

a serial bus node manager coupled to said serial bus to transfer commands to and receive information from said serial bus node to manage events on said serial bus;

wherein said serial bus diagnostic port permits externally controlled test and debug access from said serial bus connector via said master internal logic interface to said flash memory controller and said internal logic.

18. The digital system of claim 17, further comprising:

wherein said serial bus diagnostic connector is operable to selectively couple the serial bus diagnostic port or the serial bus node manager to the serial bus.

19. The digital system of claim 17, wherein the serial bus diagnostic port comprises an I.E.E.E. 1394 diagnostic port.

20. The digital system of claim 17, wherein the serial bus diagnostic port comprises a network interface diagnostic port.

21. The digital system of claim 17, wherein the serial bus diagnostic port comprises a wireless Internet diagnostic port.

22. The digital system of claim 17, wherein the serial bus diagnostic port comprises a universal serial bus (USB) diagnostic port.