Adaptive data slicer

• US 6,735,260 B1
• Filed: 04/17/2000
• Issued: 05/11/2004
• Est. Priority Date: 04/17/2000
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Satoh, Yasuhiro, Kaufmann, Yaron, Eliezer, Oren
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): WILLIAMS, LAWRENCE B
• Application Number:
  US09/550,569
• Time in Patent Office: 1,485 Days
• Field of Search: 375/316, 375/318, 375/345, 375/286, 327/58, 327/100, 348/476, 348/622
• US Class Current: 375/316
• CPC Class Codes: H04L 25/062 Setting decision thresholds using feedforward techniques only
• CPC Class Codes: H04L 25/065 Binary decisions

Abstract

An adaptive data slicer which functions to adapt to changes in the properties of a signal input thereto by producing a near optimal slicing threshold in accordance with the input signal for use in a decision circuit. The slicing level is considered optimal when its use in the decision circuit minimizes the bit error probability. The data slicer utilizes two peak detectors, a maximum peak detector for detecting the highest levels of the input signal and a minimum peak detector for detecting the lowest levels of the input signal.

Claims

1. An adaptive data slicer for generating digital data from an input signal, comprising:

a maximum peak detector for detecting the highest levels of said input signal and for generating a maximum peak detection signal therefrom;

a minimum peak detector for detecting the lowest levels of said input signal and for generating a minimum peak detection signal therefrom;

a first discharge circuit adapted to discharge said maximum peak detector signal to ground in accordance with one or more discharge control signals;

a second discharge circuit adapted to discharge said minimum peak detector signal to a supply voltage in accordance with said one or more discharge control signals;

a processor adapted to generate said one or more discharge control signals in accordance with a function of said maximum peak detection signal and said minimum peak detection signal;

averaging means for generating an averaged signal representing the average of said maximum peak detection signal and said minimum peak detection signal; and

decision means for comparing said input signal with said averaged signal so as to generate a ‘

1’

when said input signal is greater than said averaged signal and to generate a ‘

0’

when said input signal is less than said averaged signal.

2. The data slicer according to claim 1, wherein said processor comprises a function of said maximum peak detection signal and said minimum peak detection signal.

3. The data slicer according to claim 2, wherein said function comprises a difference function.

4. The data slicer according to claim 1, wherein said function in said processor is adapted to accelerate the discharge rate of said first discharge circuit and said second discharge circuit when the difference between said maximum peak detection signal and said minimum peak detection signal exceeds a first threshold.

5. The data slicer according to claim 4, wherein said first threshold comprises a predetermined threshold.

6. The data slicer according to claim 4, wherein said first threshold is dynamically set via threshold setting means.

7. The data slicer according to claim 1, wherein said function in said processor is adapted to disable discharging of said first discharge circuit and said second discharge circuit when the difference between said maximum peak detection signal and said minimum peak detection signal falls below a second threshold.

8. The data slicer according to claim 7, wherein said second threshold comprises a predetermined threshold.

9. The data slicer according to claim 7, wherein said second threshold is dynamically set via threshold setting means.

10. The data slicer according to claim 1, wherein said first discharge circuit comprises a constant current source connected to ground.

11. The data slicer according to claim 1, wherein said second discharge circuit comprises a constant current source connected to said supply voltage.

12. The data slicer according to claim 1, wherein said input signal comprises the output of a baseband processor in a Frequency Shift Keying (FSK) communications receiver.

13. The data slicer according to claim 1, wherein said maximum peak detector comprises an RC charging circuit.

14. The data slicer according to claim 13, wherein said RC charging circuit comprises a selectable resistance.

15. The data slicer according to claim 1, wherein said minimum peak detector comprises an RC charging circuit.

16. The data slicer according to claim 15, wherein said RC charging circuit comprises a selectable resistance.

17. The data slicer according to claim 1, wherein said maximum peak detector comprises a current source.

18. The data slicer according to claim 17, wherein said current source comprises a fixed current source.

19. The data slicer according to claim 17, wherein said current source comprises a variable current source.

20. The data slicer according to claim 1, wherein said minimum peak detector comprises a current source.

21. The data slicer according to claim 20, wherein said current source comprises a fixed current source.

22. The data slicer according to claim 20, wherein said current source comprises a variable current source.

23. The data slicer according to claim 1, wherein said maximum peak detector is adapted to maintain a first set of thresholds and wherein said minimum peak detector is adapted to maintain a second set of thresholds separate and independent from said first set of thresholds.

24. A method for adaptively data slicing an input signal and generating digital data therefrom, said method comprising the steps of:

detecting the highest levels of said input signal and generating a maximum peak detection signal therefrom;

detecting the lowest levels of said input signal and generating a minimum peak detection signal therefrom;

discharging said maximum peak detector signal to ground in accordance with a first function whose input includes said maximum peak detection signal and said minimum peak detection signal;

discharging said minimum peak detector signal to a supply voltage in accordance with a second function whose input includes said maximum peak detection signal and said minimum peak detection signal;

generating an average signal representing the average of said maximum peak detection signal and said minimum peak detection signal; and

comparing said input signal with said averaged signal so as to generate a ‘

1’

when said input signal is greater than said averaged signal and to generate a ‘

0’

when said input signal is less than said averaged signal.

25. The method according to claim 24, wherein said first function is adapted to accelerate the discharge rate of said maximum peak detection signal and said minimum peak detection signal when the difference therebetween exceeds a first threshold.

26. The method according to claim 24, wherein said first threshold comprises a predetermined threshold.

27. The method according to claim 24, wherein said first threshold is set dynamically in accordance with threshold setting means.

28. The method according to claim 24, wherein said second function is adapted to disable discharging of said maximum peak detection signal and said minimum peak detection signal when the difference therebetween falls below a second threshold.

29. The method according to claim 28, wherein said second threshold comprises a predetermined threshold.

30. The method according to claim 28, wherein said second threshold is set dynamically in accordance with threshold setting means.

31. The method according to claim 24, wherein said input signal comprises the output of a baseband processor in a Frequency Shift Keying (FSK) communications receiver.

32. The method according to claim 24, wherein said step of detecting the highest levels of said input signal comprises maintaining a first set of thresholds and wherein said step of detecting the lowest levels of said input signal comprises maintaining a second set of thresholds separate and independent from said first set of thresholds.

33. A Frequency Modulation (FM) communications receiver, comprising:

a receiver front end for converting a signal received from a channel to an Intermediate Frequency (IF) signal;

an IF filter coupled to said receiver front end and adapted to filter said IF signal;

an FM demodulator adapted to convert the output of said IF filter to a baseband signal;

a baseband filter coupled to said FM demodulator and adapted to filter said baseband signal; and

an adaptive data slicer comprising;

means for detecting the highest and lowest levels of said baseband signal and generating a maximum peak signal and minimum peak signal, respectively;

averaging means for generating an averaged signal representing the average of said maximum peak detection signal and said minimum peak detection signal;

decision means for comparing said baseband signal with said averaged signal so as to generate a ‘

1’

when said baseband signal is greater than said averaged signal and to generate a ‘

0’

when said baseband signal is less than said averaged signal; and

means for discharging said maximum peak signal to ground and said minimum peak signal to a supply voltage in accordance with a fuinction of said maximum peak signal and said minimum peak signal.