Calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture

• US 6,735,422 B1
• Filed: 10/02/2000
• Issued: 05/11/2004
• Est. Priority Date: 10/02/2000
• Status: Expired due to Term

• Current Assignee: M-Red Inc. (Quest Patent Research Corporation)
• Original Assignee: Conexant Incorporated (Synaptics Incorporated)
• Inventors: Webster, Mark A., Prentice, John S., Landy, Patrick J., Schultz, R. Douglas, Baldwin, Keith R.
• Primary Examiner(s): Urban, Edward F.
• Assistant Examiner(s): LE, LANA N
• Application Number:
  US09/677,975
• Time in Patent Office: 1,317 Days
• Field of Search: 455/234.1, 455/324, 455/303, 455/341, 455/296, 455/305, 455/232.1, 455/67.11, 455/67.12, 455/67.13, 455/209
• US Class Current: 455/232.1
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H03D 3/009 Compensating quadrature phase or amplitude imbalances
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 2027/0016 Stabilisation of local oscillators
• CPC Class Codes: H04L 27/0014 Carrier regulation of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657

Abstract

A calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency (ZIF) architecture. The device includes a ZIF transceiver and a baseband processor, which further includes a calibrator that periodically performs a calibration procedure. The baseband processor includes gain control logic, DC control logic, a gain converter and the calibrator. The gain converter converts gain between the gain control logic and the DC control logic. The calibrator programs the gain converter with values determined during the calibration procedure. The gain converter may be a lookup table that stores gain conversion values based on measured gain of a baseband gain amplifier of the ZIF transceiver. The gain control logic may further include a gain adjust limiter that limits change of a gain adjust signal during operation based on a maximum limit or on one or more gain change limits. A second lookup table stores a plurality of DC adjust values, which are added during operation to further reduce DC offset. The calibration procedure includes sampling an output signal for each gain step of the baseband amplifier at two predetermined range values and corresponding DC offsets using successive approximation. The data is used to calculate gain, DC offset and DC differential values, which are used to determine the conversion values programmed into the lookup tables or the gain adjust limiter.

Claims

1. A calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency (ZIF) architecture, comprising:

a combiner that combines a DC offset signal with an input signal and that provides an adjusted input signal;

a gain amplifier that receives the adjusted input signal and that provides an amplified input signal based on a gain adjust signal;

a gain feedback circuit that receives the amplified input signal, that estimates input signal power and that provides the gain adjust signal in an attempt to maintain the input signal power at a target power level;

a DC estimator that estimates a DC level in the amplified input signal and that provides a DC estimate signal;

a DC amplifier that receives the DC estimate signal and that provides the DC offset signal based on a gain conversion signal;

a programmable gain converter, coupled to the DC amplifier and the gain feedback circuit, that provides the gain conversion signal based on the gain adjust signal; and

a calibrator, coupled to the gain converter and the gain feedback circuit, that periodically performs a calibration procedure and that programs the gain converter.

2. The calibrated DC compensation system of claim 1, further comprising:

the gain adjust signal having a plurality of gain steps;

the gain converter including an adjust memory, the adjust memory including a plurality of adjust values, each adjust value corresponding to at least one of the plurality of gain steps of the gain adjust signal;

the gain converter providing the gain conversion signal to the DC amplifier based on the gain adjust signal and a corresponding one of the plurality of adjust values; and

the calibrator determining a plurality of DC differential values, each DC differential value corresponding to at least one of the plurality of gain steps of the gain adjust signal, the calibrator programming the adjust memory based on the plurality of DC differential values.

3. The calibrated DC compensation system of claim 2, wherein the plurality of adjust values incorporate conversion of gain ranges and gain scales between the gain amplifier and the DC amplifier.

4. The calibrated DC compensation system of claim 2, wherein each of the plurality of adjust values comprises either one of a multiplier and an additive value.

5. The calibrated DC compensation system of claim 1, further comprising:

the gain adjust signal having a plurality of gain steps;

the gain converter comprising a lookup table that stores a plurality of gain conversion values, each gain conversion value corresponding to one of the plurality of gain steps of the gain adjust signal, wherein the lookup table provides a corresponding gain conversion value for each gain step of the gain adjust signal; and

the calibrator determining a plurality of gain values of the gain amplifier, each gain value corresponding to one of the plurality of gain steps of the gain adjust signal, the calibrator programming the lookup table with the plurality of gain conversion values.

6. The calibrated DC compensation system of claim 5, wherein the calibrator incorporates differences in gain ranges and gain scales of the gain amplifier and the DC amplifier when determining the plurality of gain conversion values.

7. The calibrated DC compensation system of claim 5, further comprising:

the calibrator controlling the gain feedback circuit to apply the gain adjust signal to each of the plurality of gain steps;

for each of the plurality of gain steps, the calibrator adjusting a DC offset and sampling the amplified input signal until the amplified input signal achieves first and second predetermined range values with corresponding first and second DC offset values; and

the calibrator determining the plurality of gain conversion values using the first and second predetermined range values and the first and second DC offset values for each of the plurality of gain steps.

8. The calibrated DC compensation system of claim 7, further comprising:

the first and second predetermined range values corresponding to a predetermined range of the amplified input signal; and

the calibrator using a successive approximation procedure to determine the first and second DC offset values.

9. The calibrated DC compensation system of claim 7, further comprising:

a second lookup table that stores a plurality of DC adjust values, each corresponding to one of the plurality of gain steps of the gain adjust signal, wherein the second lookup table provides a corresponding DC adjust value for each gain step of the gain adjust signal;

the calibrator determining the plurality of DC adjust values using the first and second DC offset values for each of the plurality of gain steps;

the DC amplifier providing a gain compensated DC signal; and

a second combiner, coupled to the second lookup table and the DC amplifier, that combines the gain compensated DC signal with a DC adjust value from the second lookup table to provide the DC offset signal.

10. The calibrated DC compensation system of claim 5, wherein the gain feedback circuit further comprises a gain adjust limiter that limits change of the gain adjust signal during operation.

11. The calibrated DC compensation system of claim 10, further comprising:

the gain adjust limiter limiting change of the gain adjust signal to a maximum gain change limit; and

the calibrator using an upper bound method to determine the maximum gain change limit based on the determined plurality of gain values and a predetermined linear DC offset change model of the gain amplifier.

12. The calibrated DC compensation system of claim 10, further comprising:

the gain adjust limiter limiting change of the gain adjust signal based on at least one gain change limit;

the calibrator further determining a plurality of DC offset values, each DC offset value corresponding to one of the plurality of gain values; and

the calibrator determining the at least one gain change limit using the plurality of gain values and the plurality of DC offset values and programming the gain adjust limiter with the at least one gain change limit.

13. The calibrated DC compensation system of claim 12, wherein the at least one gain change limit comprises a plurality of gain change limits that corresponds to the plurality of gain values.

14. A wireless communication device with calibrated DC compensation, comprising:

a ZIF transceiver, comprising;

an RF mixer circuit that converts a radio frequency (RF) signal to a baseband input signal;

a combiner, coupled to the RF mixer, that combines a DC offset signal with the baseband input signal to provide an adjusted baseband input signal; and

a baseband amplifier, coupled to the combiner, that receives the adjusted baseband input signal and that asserts an amplified input signal based on a gain adjust signal; and

a baseband processor, coupled to the ZIF transceiver, the baseband processor comprising;

gain control logic that receives the amplified input signal, that estimates input signal power and that asserts the gain adjust signal in an attempt to keep the input signal power at a target power level;

DC control logic that estimates an amount of DC in the amplified input signal and that provides the DC offset signal in an attempt to reduce DC level of the amplified input signal;

a gain converter, coupled to the gain control logic and the DC control logic, that converts gain between the gain control logic and the DC control logic; and

calibration logic, coupled to the gain converter and the gain control logic, that periodically performs a calibration procedure and that programs the gain converter.

15. The wireless communication device of claim 14, further comprising:

the gain adjust signal having a plurality of gain steps;

the gain converter comprising a memory device that stores a plurality of gain conversion values, each gain conversion value corresponding to one of the plurality of gain steps of the gain adjust signal, wherein the memory device provides a corresponding gain conversion value for each gain step of the gain adjust signal; and

the calibration logic setting the gain adjust signal to each of the plurality of gain steps, determining a corresponding plurality of gain values of the baseband amplifier and programming the memory device with the plurality of gain conversion values.

16. The wireless communication device of claim 15, wherein the gain control logic further comprises a gain adjust limiter that limits change of the gain adjust signal during operation.

17. The wireless communication device of claim 16, further comprising:

the gain adjust limiter limiting change of the gain adjust signal to a maximum gain change limit; and

the calibration logic using an upper bound method to determine the maximum gain change limit based on the plurality of gain values and a predetermined linear DC offset change model of the baseband amplifier.

18. The wireless communication device of claim 16, further comprising:

the gain adjust limiter limiting change of the gain adjust signal based on a plurality of gain change limits;

the calibration logic further determining a plurality of DC offset values, each DC offset value corresponding to one of the plurality of gain steps; and

the calibration logic determining the at least one gain change limit using the plurality of gain values and the plurality of DC offset values and programming the gain adjust limiter with the plurality of gain change limits.

19. The wireless communication device of claim 15, further comprising:

the calibration logic controlling the gain control logic to apply the gain adjust signal to each of the plurality of gain steps;

for each of the plurality of gain steps, the calibration logic controlling the DC control logic to adjust the DC offset signal and sampling the amplified input signal until the amplified input signal achieves first and second predetermined range values with corresponding first and second DC offset values; and

the calibration logic determining the plurality of gain conversion values using the first and second predetermined range values and the first and second DC offset values for each of the plurality of gain steps.

20. The calibrated DC compensation system of claim 19, further comprising:

a second memory device, coupled to the calibration logic and the DC control logic, that stores a plurality of DC adjust values, each corresponding to one of the plurality of gain steps of the gain adjust signal, wherein the second lookup table provides a corresponding DC adjust value for each gain step of the gain adjust signal;

the calibration logic determining the plurality of DC adjust values using the first and second DC offset values for each of the plurality of gain steps; and

the DC control logic adjusting the DC offset signal with received DC adjust values from the second memory device.

21. A method of reducing DC in a wireless zero intermediate frequency (ZIF) device, comprising:

converting a received radio frequency (RF) signal to a baseband signal;

combining a DC offset with the baseband signal to achieve an adjusted baseband signal;

amplifying the adjusted baseband signal based on a gain signal to provide an amplified input signal;

determining a power level of an input baseband signal from the amplified input signal;

controlling the gain signal to achieve a target power level of the input baseband signal;

determining a DC level of the amplified input signal;

providing a gain conversion signal based on the gain signal;

controlling the DC offset based on the gain conversion signal and the determined DC level of the amplified input signal in an attempt to reduce the DC level of the amplified input signal; and

periodically performing a calibration procedure to adjust the gain conversion signal.

22. The method of claim 21, further comprising:

the performing a calibration procedure comprising;

measuring a gain value for each of a plurality of gain levels of the gain signal; and

storing a plurality of gain conversion values, each corresponding to one of the plurality of gain levels; and

the providing a gain conversion signal comprising providing one of the plurality of gain conversion values for each of the plurality of gain levels of the gain signal.

23. The method of claim 22, wherein the performing a calibration procedure further comprises converting between gain ranges and gain scales.

24. The method of claim 22, further comprising:

the performing a calibration procedure further comprising determining a maximum gain change limit; and

the controlling the gain signal comprising limiting change of the gain signal based on a gain level of the gain signal and the maximum gain change limit.

25. The method of claim 22, further comprising:

the performing a calibration procedure further comprising;

measuring a plurality of DC offset values, each corresponding to one of a plurality of gain levels of the gain signal;

determining a plurality of gain change limit values based on the plurality of gain values and the plurality of DC offset values; and

storing the plurality of gain change limit values, each corresponding to one of the plurality of gain levels; and

the controlling the gain signal comprising limiting change of the gain signal based on a gain level of the gain signal and a corresponding one of the plurality of gain change limit values.

26. The method of claim 22, further comprising:

the performing a calibration procedure further comprising;

measuring at least one DC offset value for each of a plurality of gain levels of the gain signal; and

storing a plurality of DC adjust values; and

the controlling the DC offset including adding one of the plurality of DC adjust values based on a gain level of the gain signal.

27. The method of claim 21, wherein the performing a calibration procedure further comprises:

setting the gain signal to each of a plurality of gain levels;

for each gain level, determining a first DC offset value to achieve a first predetermined range limit of the amplified input signal; and

for each gain level, determining a second DC offset value to achieve a second predetermined range limit of the amplified input signal.

28. The method of claim 27, wherein the determining the first and second DC offset values is based on successive approximation.

29. The method of claim 27, further comprising:

determining and storing a plurality of gain values for each gain level of the gain signal using the first and second DC offset values.

30. The method of claim 27, further comprising:

determining and storing a plurality of DC offset values for each gain level of the gain signal using the first and second DC offset values.