Manufacturing method for field-effect transistor

• US 6,737,302 B2
• Filed: 10/30/2002
• Issued: 05/18/2004
• Est. Priority Date: 10/31/2001
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arao, Tatsuya
• Primary Examiner(s): CHEN, JACK S J
• Application Number:
  US10/284,275
• Publication Number:
  US 20030109086A1
• Time in Patent Office: 566 Days
• Field of Search: 438/149, 438/151, 438/159, 438/161, 438/163, 438/164, 438/166
• US Class Current: 438/149
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel

Abstract

To provide a manufacturing method for a field-effect transistor, such as a thin-film transistor, enabling reductions in the number patterning steps and the number of photomasks and improvements in the throughput and the yield. In the method, an oxide film is formed by processing the surface of a crystalline semiconductor with ozone water or hydrogen peroxide water. Using the oxide film thus formed as an etch stop, a gate electrode, a source electrode, and a drain electrode of the field-effect transistor are simultaneously formed from a same starting film in one patterning step by use of one photomask. After forming the gate electrode, the source electrode, and the drain electrode, heating is performed thereon at 800° C. or higher for a predetermined time. Thereby, the contact resistances between the source electrode and the crystalline semiconductor and between the drain electrode and the crystalline semiconductor are reduced, whereby improving the electrical conductivity.

Claims

1. A manufacturing method for a field-effect transistor, comprising:

forming a first insulation film over a crystalline semiconductor;

forming a gate insulation film over a portion of the crystalline semiconductor by patterning the first insulation film;

forming an oxide film by oxidizing a surface of the crystalline semiconductor by using an oxidizing water solution;

forming a conductive film over the oxide film and the gate insulation film, the conductive film comprising a semiconductor film containing an impurity having one conductivity type;

simultaneously forming a gate electrode, a source electrode, a drain electrode by patterning the conductive film;

introducing an impurity having said one conductivity type to the crystalline semiconductor by using the gate electrode, the source electrode, and the drain electrode as masks; and

heating the crystalline semiconductor, the oxide film, the gate insulation film, the gate electrode, the source electrode, and the drain electrode in an inert gas ambient at a temperature of from 800°

C. to 1050°

C. for a time period of from 30 minutes to 4 hours.

2. A manufacturing method for a field-effect transistor according to claim 1, wherein the impurity contained in the source electrode and the impurity contained in the drain electrode are dispersed to the crystalline semiconductor in the (step of) heating.

3. A manufacturing method for a field-effect transistor according to claim 1, wherein the oxidizing water solution is one of ozone water solution and hydrogen peroxide water solution.

4. A manufacturing method for a field-effect transistor according to claim 1, wherein said one conductivity is a n-type conductivity.

5. A manufacturing method for a field-effect transistor according to claim 1, wherein said one conductivity is a p-type conductivity.

6. A manufacturing method for a field-effect transistor, comprising:

forming a semiconductor film over a substrate;

forming a crystalline semiconductor film by crystallizing the semiconductor film;

forming an island-like crystalline semiconductor film by patterning the crystalline semiconductor film;

forming a first insulation film over the island-like crystalline semiconductor film;

forming a gate insulation film over a portion of the island-like crystalline semiconductor film by patterning the first insulation film;

forming an oxide film by oxidizing a surface of the island-like crystalline semiconductor film by using an oxidizing water solution;

forming a conductive film over the substrate, and over the oxide film and the gate insulation film, the conductive film comprising a semiconductor film containing an impurity having one conductivity type;

simultaneously forming a gate electrode, a source electrode, a drain electrode by patterning the conductive film;

introducing an impurity having said one conductivity type to the island-like crystalline semiconductor film by using the gate electrode, the source electrode, and the drain electrode as masks; and

heating the substrate having at least the island-like crystalline semiconductor film, the oxide film, the gate insulation film, the gate electrode, the source electrode, and the drain electrode formed thereon, in an inert gas ambient at a temperature of from 800°

C. to 1050°

C. for a time period of from 30 minutes to 4 hours.

7. A manufacturing method for a field-effect transistor according to claim 6, wherein the impurity contained in the source electrode and the impurity contained in the drain electrode are dispersed to the island-like crystalline semiconductor film in the (step of) heating.

8. A manufacturing method for a field-effect transistor according to claim 6, wherein the substrate is a quartz substrate.

9. A manufacturing method for a field-effect transistor according to claim 6, wherein the oxidizing water solution is one of ozone water solution and hydrogen peroxide water solution.

10. A manufacturing method for a field-effect transistor according to claim 6, wherein said one conductivity is a n-type conductivity.

11. A manufacturing method for a field-effect transistor according to claim 6, wherein said one conductivity is a p-type conductivity.

12. A manufacturing method for a field-effect transistor, comprising:

forming a first insulation film over a crystalline semiconductor;

forming a gate insulation film over a portion of the crystalline semiconductor by patterning the first insulation film;

forming an oxide film by oxidizing a surface of the crystalline semiconductor by using an oxidizing water solution;

forming a conductive film over the oxide film and the gate insulation film, the conductive film comprising a semiconductor film containing an impurity having one conductivity type;

simultaneously forming a gate electrode, a source electrode, a drain electrode by patterning the conductive film;

introducing an impurity having one conductivity type to the crystalline semiconductor by using the gate electrode, the source electrode, and the drain electrode as masks; and

heating the crystalline semiconductor, the oxide film, the gate insulation film, the gate electrode, the source electrode, and the drain electrode in order to reduce a contact resistance between the crystalline semiconductor and the source electrode and the drain electrode.

13. A manufacturing method for a field-effect transistor according to claim 12, wherein the impurity contained in the source electrode and the impurity contained in the drain electrode are dispersed to the crystalline semiconductor film in the (step of) heating.

14. A manufacturing method for a field-effect transistor according to claim 12, wherein the oxidizing water solution is one of ozone water solution and hydrogen peroxide water solution.

15. A manufacturing method for a field-effect transistor according to claim 12, wherein said one conductivity is a n-type conductivity.

16. A manufacturing method for a field-effect transistor according to claim 12, wherein said one conductivity is a p-type conductivity.

17. A manufacturing method for a field-effect transistor according to claim 12, wherein the crystalline semiconductor, the oxide film, the gate insulation film, the gate electrode, the source electrode, and the drain electrode are heated in an inert gas ambient.