Method of fabricating a trench structure substantially filled with high-conductivity material

• US 6,737,323 B2
• Filed: 06/11/2001
• Issued: 05/18/2004
• Est. Priority Date: 06/30/1999
• Status: Expired due to Fees

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Mo, Brian S.
• Primary Examiner(s): Lee, Eddie
• Assistant Examiner(s): Magee, Thomas
• Application Number:
  US09/879,029
• Publication Number:
  US 20020024091A1
• Time in Patent Office: 1,072 Days
• Field of Search: 257/388, 257/397, 257/333, 257/332, 257/330, 438/386, 438/396, 438/648, 438/761, 438/519, 438/270, 438/256, 438/253, 438/239
• US Class Current: 438/270
• CPC Class Codes: H01L 21/28061 the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction H01L21/28052 takes precedence
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 29/4933 with a silicide layer contacting the silicon layer, e.g. Polycide gate with a barrier layer between the silicide and silicon layers H01L29/4941
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench structure that is substantially filled with high-conductivity material such as refractory metal particularly suitable for fast switching trench MOSFET applications. The trench is first lined by a dielectric material such as silicon dioxide. A layer of polysilicon is then formed on the dielectric material and provides buffering for stress relief. The trench is then filled substantially with refractory metal such as tungsten.

Claims

1. A method for fabricating a trench structure in a substrate, the method comprising the steps of:

(a) forming a trench in a substrate;

(b) forming a dielectric material lining at least a wall of the trench;

(c) forming a buffer layer on the dielectric material to fill a first portion of the trench, the buffer layer having a first electrical conductivity;

(d) substantially filling a remainder of the trench with a high-conductivity material having a second electrical conductivity, the second electrical conductivity being greater than the first electrical conductivity; and

(e) forming a polycide layer in the trench between the buffer layer and the high-conductivity materials,

wherein the polycide layer, the buffer layer and the high-conductivity material are in the trench after (e).

2. The method of claim 1 wherein the step of forming a buffer layer comprises forming a layer of polysilicon.

3. The method of claim 2 wherein the step of forming a layer of polysilicon further comprises a step of implanting the layer of polysilicon.

4. The method of claim 2 wherein the step of filling the remainder of the trench with the high-conductivity material comprises forming a layer of refractory metal.

5. The method of claim 4 wherein the step of forming a layer of refractory metal comprises using a low pressure chemical vapor deposition (LPCVD) process.

6. The method of claim 5 wherein a fluoride-containing precursor is used in the LPCVD process.

7. The method of claim 6 wherein the fluoride-containing precursor comprises tungsten hexafluoride.

8. The method of claim 4 wherein the trench structure is formed as part of a trench transistor including dopant junctions, and wherein forming the trench occurs after the dopant junctions are formed.

13. The method of claim 1 wherein substantially filling the remainder of the trench includes completely filling the remainder of the trench with the high-conductivity material.

14. The method of claim 13 wherein the high-conductivity material includes tungsten.

15. The method of claim 1 wherein the buffer layer comprises polysilicon, wherein the buffer layer has a resistivity less than about 500 μ

Ω

-cm.

9. A method for fabricating a trench transistor, the method comprising:

(a) forming a trench with sidewalls in a bulk silicon region of a substrate;

(b) growing a gate oxide layer to line the trench;

(c) depositing a conformal layer of polysilicon on the gate oxide layer to fill a first portion of the trench, thereby coating the sidewalls of the trench;

(d) stopping (c) so that the conformal layer of polysilicon has a U-shaped profile; and

(e) substantially filling a remainder of the trench with a metal layer formed in a low pressure chemical vapor deposition (LPCVD) process.

10. The method of claim 9 wherein the step of filling comprises depositing tungsten by the LPCVD process using tungsten hexafluoride as a precursor.

11. The method of claim 9 wherein the metal layer is a refractory metal.

12. The method of claim 9 wherein the metal layer completely fills the remainder of the trench.

16. The method of claim 9 wherein the conformal layer has a resistivity less than about 500 μ

Ω

-cm.

17. The method of claim 9 wherein the trench transistor is a vertical power MOSFET.