Transistor and method of manufacturing the same

• US 6,737,704 B1
• Filed: 09/12/2000
• Issued: 05/18/2004
• Est. Priority Date: 09/13/1999
• Status: Expired due to Term

• Current Assignee: Shindengen Electric Manufacturing Company Limited
• Original Assignee: Shindengen Electric Manufacturing Company Limited
• Inventors: Watanabe, Yuji, Takemori, Toshiyuki
• Primary Examiner(s): Pham, Long
• Assistant Examiner(s): Rao, Shrinivas H.
• Application Number:
  US09/660,439
• Time in Patent Office: 1,344 Days
• Field of Search: 257/329, 257/330, 257/333, 257/339, 257/476
• US Class Current: 257/329
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A technique is provided which makes it possible to reduce the area of a power MOSFET. A power MOSFET 1 according to the invention is a trench type in which a source region 27 is exposed on both of a substrate top surface 51 and an inner circumferential surface 52 of a trench 18. Since this makes it possible to provide contact between the source region 27 and a source electrode film 29 not only on the substrate top surface 51 but also on the inner circumferential surface 52 of the trench 18, source contact is provided with a sufficiently low resistance only on the substrate top surface, and the area of the device can be made smaller than that in the related art in which the source region 27 has been formed in a larger area.

Claims

1. A transistor comprising:

a semiconductor substrate having a semiconductor layer, a drain layer of a first conductivity type provided on said semiconductor layer and a conductive region of a second conductivity type formed by diffusing an impurity of the second conductivity type from a surface of said drain layer;

surface of said source region, said contiguous source electrode film covering a plurality of openings of said trenches in their entireties,

said source region being substantially square when viewed from a direction parallel to said side surface of said trench; and

a metal film formed on a surface of said drain layer opposite to said conductive region to establish Schottky contact with said drain layer.

2. A transistor according to claim 1, further comprising a drain electrode film formed on a surface of said semiconductor layer located opposite said drain layer.

3. A transistor according to claim 1, wherein the impurity concentration of said semiconductor layer is higher than the impurity concentration of said drain layer.

4. A transistor according to claim 1, further comprising an insulating material thicker than said gate insulating film provided between said gate electrode material in said trench and said source electrode film.

5. A transistor according to claim 4, wherein said insulating material is any one of a silicon oxide film, a combination of a silicon oxide film and PSG film, a combination of silicon oxide film and a BPSG film, and a combination of a silicon oxide film and a silicon nitride film.

6. A transistor according to claim 4, wherein said insulating material has a thickness of at least 0.01 μ

m and at most 1.0 μ

m.

7. A transistor according to claim 5, wherein said insulating material has a thickness of at least 0.01 μ

m ad at at most 10 μ

m.

8. A transistor according to claim 1, wherein said trench is provided in the form of a mesh on a top surface of said semiconductor substrate and wherein said source region is provided in contact with said trench.

9. A transistor according to claim 1, wherein said semiconductor layer is of the first conductivity type.

10. A transistor according to claim 1, wherein said semiconductor layer is of the second conductivity type.

11. A transistor comprising:

a semiconductor substrate having a drain layer of a first conductivity type and a conductive region of a second conductivity type formed by diffusing an impunity of the second conductivity type from a surface of said drain layer;

a trench provided such that it extends from a surface of said conductive region to said drain layer;

a source region of the first conductivity type provided in inner surface of said conductive region and exposed on side surface of said trench;

a gate insulating film provided on the side surface of said trench, an upper part of the gate insulating film being in contact with a lower part of said source region, a bottom part being in contact with an upper part of said drain layer, and a middle part being in contact with said conductive region;

a gate electrode material provided in contact with said gate insulating film in said trench;

a source electrode film provided in contact with said source region exposed at least on the side surface of said trench and electrically insulated from said gate electrode material, said source electrode film being contiguous and extending front an upper portion of said source region and a side surface of said source region, said contiguous source electrode film covering an opening or said trench in its entirety,

said source region being substantially square when viewed from a direction parallel to said side surface of said trench; and

a metal film formed on a surface of said drain layer opposite to said conductive region to establish Schottky contact with said drain layer.

12. A transistor comprising:

a semiconductor substrate having a semiconductor layer, a drain layer of a first conductivity type and a conductive region of a second conductivity type formed by diffusing an impurity of the second conductivity type from a surface of said drain layer;

a trench provided such that it extends from a surface of said conductive region lo said drain layer,

a source region of the first conductivity type provided inner surface of said conductive region and exposed on a side surface of said trench;

a gate insulating film provided on the side surface of said trench, an upper part of the gate insulating film being in contact with a lower part of said source region, a bottom part being in contact with an upper part of said drain layer, and a middle part being in contact with said conductive region;

a gate electrode material provided in contact with said gate insulating film in said trench;

a source electrode film provided in contact with said source region exposed at least on the side surface of said trench and electrically insulated from said gate electrode material, wherein the transistor comprises a plurality of said source regions and outer periphery of each of said source regions is exposed at a side of upper part of said trench.

13. A transistor according to claim 12, wherein each of said source regions annular when viewed from a direction parallel to said side surface of said trench.

14. A transistor comprising:

a semiconductor substrate having a drain layer of a first conductivity type and conductive region of a second conductivity type formed by diffusing an impurity of she second conductivity type from a surface of said drain layer;

a trench provided such that it extends from a surface of said conductive region to said drain layer;

a source region of the first conductivity type provided inner surface of said conductive region and exposed on a side surface of said trench;

a gate insulating film provided on the side surface of said trench, and an upper part of the gate insulating film being, in contact with a lower part of said source region, a bottom part being in contact with an upper part of said drain layer, and a middle part being in contact with said conductive region;

a gate electrode material provided in contact with said gate insulating film in said trench;

a source electrode film provided in contact with said source region exposed at least on the side surface of said trench and electrically insulated from said gate electrode material,

said source region being substantially square when viewed from a direction parallel to said

side surface of said trench, wherein the transistor comprises a plurality of said source regions and outer periphery of each said source regions is exposed at a side of upper part of said trench; and

a metal film formed on a surface of said drain layer opposite to said conductive region to establish Schottky contact with said drain layer.

15. A transistor according to claim 14, wherein each of said source regions is annular when viewed from a direction parallel to said side surface of said trench.

16. A transistor comprising:

a semiconductor substrate having a semiconductor layer, a drain layer of a first conductivity type provided on said semiconductor layer and a conductive region of a second conductivity type formed by diffusing an impurity of the second conductivity type from a surface of said drain layer;

a plurality of trenches, each of said plurality of trenches being provided such that it extends from a surface of said conductive region to said drain layer;

a source region of the first conductivity type provided inner surface of said conductive region and exposed on side surface of said trench;

a gate insulating film provided on the side surface of said trench, an upper part of the gate insulating film being in contact with a lower part of said source region, a bottom part being in contact with an upper part of said drain layer, and a middle part being in contact with conductive region;

a gate electrode material provided in contact with said gate insulating film in said trench;

a source electrode film provided in contact with at least said source region exposed at least on the side surface of said trench and electrically insulated from said gate electrode material, said source region being substantially square when viewed from a direction parallel to said side surface of said trench, said source electrode film being contiguous and extending from an upper portion of said source region and a side surface of said source region, said contiguous source electrode film covering a plurality of openings of said trenches in their entireties.

17. A transistor comprising:

a semiconductor substrate having a drain layer of a first conductivity type and a conductive region of a second conductivity type formed by diffusing an impurity of the second conductivity type front a surface of said drain layer;

a plurality of trenches, each of said plurality of trenches being provided such that it extends from a surface of said conductive region to said drain layer,

a source region of the first conductivity type provided in inner surface of said conductive region and exposed on side surface of said trench;

a gate insulating film provided on the side surface of said trench, an upper part of the gate insulating film being in contact with a lower part or said source region, a bottom part being in contact with an upper part of said drain layer, and a middle part being in contact with said conductive region;

a gate electrode material provided in contact with said gate insulating film in said trench;

a source electrode film provided in contact with said source region exposed at least on the side surface of said trench and electrically insulated from said gate electrode material, said source electrode film being contiguous and extending from an upper portion of said source region and a side surface of said source region, said contiguous source electrode film covering a plurality of openings of said trenches in their entireties;

said source region being substantially square when viewed from a direction parallel to said side surface of said trench; and

a metal film formed on a surface of said drain layer opposite to said conductive region to establish Schottky contact with said drain layer.