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High-pressure anneal process for integrated circuits

  • US 6,737,730 B1
  • Filed: 08/31/2000
  • Issued: 05/18/2004
  • Est. Priority Date: 01/22/1996
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device comprising:

  • a metal conductive layer, the metal conductive layer subjected to a temperature substantially no greater than 80 percent of a melting point of the metal conductive layer;

    a silicon nitride structure having a portion thereof located below at least a portion of the metal conductive layer, the silicon nitride structure substantially preventing diffusion of hydrogen therethrough at standard temperature and pressure;

    a silicon dioxide layer having at least a portion thereof located under a portion of the silicon nitride structure, the portion of the silicon dioxide layer located under the portion of the silicon nitride structure having hydrogen therein from diffusing through the silicon nitride structure; and

    a silicon substrate having a portion thereof located under the portion of the silicon dioxide layer.

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