Clamp circuit

• US 6,737,905 B1
• Filed: 02/26/2003
• Issued: 05/18/2004
• Est. Priority Date: 02/26/2002
• Status: Expired due to Fees

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Ishihara, Hideaki, Suzuki, Akira, Noda, Shinichi
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): ENGLUND, TERRY LEE
• Application Number:
  US10/374,695
• Publication Number:
  US 20040080352A1
• Time in Patent Office: 447 Days
• Field of Search: 327/309, 327/318, 327/319, 327/321, 327/323, 327/327, 327/328
• US Class Current: 327/323
• CPC Class Codes: G05F 3/242 with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
• CPC Class Codes: H03K 5/08 by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding H03K5/07 takes precedence; comparing one pulse with another H03K5/22; providing a determined threshold for switching H03K17/30

Abstract

The clamp circuit clamps an input voltage at prescribed higher and lower clamp voltages which are stabilized under a temperature fluctuation. Transistors Q12 and Q14 are switched on in their linear region. In a lower voltage clamp circuit 18, an Vin detecting circuit 20 outputs Va1 by level-shifting Vin by Q13 and voltage-divides by series resistance circuit 23 the level-shifted Vin, while a reference voltage generating circuit 21 outputs Vr1 by level-shifting 0 V by Q15 and voltage-divides by series resistance circuit 25 the level-shifted voltage. Q11 is switched on, when a comparator 22 determines that Va1 descends and goes across Vr1. Here, Q12 is of the same characteristics as Q14, while Q13is of the same characteristics as Q15. Further, the resistance of the circuits 23 is the same as that of the circuit 25. The higher voltage clamp circuit 19 is similar to the circuit 18.

Claims

1. A clamp circuit which is incorporated in an IC and clamps an input voltage inputted into an input terminal of said IC, comprising:

an input voltage detecting circuit for outputting a detected voltage, wherein a first resistance circuit and a first transistor in a form of a source follower or emitter follower are connected in series between first and second supply lines and said input voltage is inputted into a control terminal of said first transistor and said detected voltage is outputted from said first resistance circuit;

a reference voltage generating circuit for outputting a reference voltage, wherein a second resistance circuit and a second transistor in a form of a source follower or emitter follower are connected in series between said first and second supply lines and a voltage of said second supply line is inputted into a control terminal of said second transistor and said reference voltage is outputted from said second resistance circuit;

a comparator for outputting an instruction signal instructing to clamp said input voltage, when said detected voltage goes across said reference voltage on the basis of comparison of said detected voltage with said reference voltage; and

a switching circuit connected between said input terminal and said first or second supply line, said switching circuit being switched on, under such a condition that said instruction signal is outputted from said comparator.

2. The clamp circuit according to claim 1, characterized in that a series resistance of said first resistance circuit is equal to that of said second resistance circuit.

3. The clamp circuit according to claim 1, characterized in that:

said first and second resistance circuits are voltage-dividing circuits comprising a plurality of resistance elements; and

said detected and reference voltages are outputted from a voltage dividing point of a respective voltage-dividing circuit.

4. The clamp circuit according to claim 1, which further comprises third and fourth tranansistors connected between said first supply line and said first and second resistance circuits, respectively,

characterized in that said third and fourth transistors are switched on and off in accordance with an enable signal.

5. The clamp circuit according to claim 1, which further comprises third and fourth transistors connected between said first supply line and said first and second resistance circuits, respectively,

characterized in that said third and fourth transistors output a respective bias current.

6. The clamp circuit according to claim 1, characterized in that said input terminal is an analog input terminal of an A/D converter in said IC.