Distributed circular geometry power amplifier architecture

• US 6,737,948 B2
• Filed: 02/28/2003
• Issued: 05/18/2004
• Est. Priority Date: 10/10/2000
• Status: Expired due to Term

• Current Assignee: California Institute of Technology
• Original Assignee: California Institute of Technology
• Inventors: Hajimiri, Seyed-Ali, Aoki, Ichiro, Kee, Scott David, Rutledge, David B.
• Primary Examiner(s): MAI, ANH T
• Application Number:
  US10/306,337
• Publication Number:
  US 20030184369A1
• Time in Patent Office: 445 Days
• Field of Search: 336/200, 336/223, 336/232
• US Class Current: 336/200
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/534 Transformer coupled at the input of an amplifier
• CPC Class Codes: H03F 2200/537 A transformer being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 3/265 with field-effect transistors only
• CPC Class Codes: H03F 3/423 with MOSFET's
• CPC Class Codes: H03F 3/604 using FET's

Abstract

The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.

Claims

1. A low loss inductor for deposition on a substrate of an integrated circuit that processes voltage signals, comprising:

an elongated conductive body deposed on the substrate and having

first and second ends,

conductive sections disposed between the ends, and

an average ac signal voltage across the body such that a section where the signal voltage is determined to be lower than the average ac signal voltage across the body is relatively wider than another section of the inductor where the signal voltage is determined to be higher than the average ac signal voltage across the body.

2. The inductor of claim 1, wherein the conductive body is a single turn circuit.

3. The inductor of claim 2, wherein the single turn circuit includes multiple straight interconnected metal sections.

4. The inductor of claim 1, wherein the conductive body is a multiple turn circuits.

5. The inductor of claim 1, wherein one end of the inductor is grounded such that the inductor is unbalanced.

6. The inductor of claim 1, wherein neither end of the inductor is grounded such that the inductor is balanced.

7. A method for reducing the electrical losses of an inductor deposed on a substrate of an integrated circuit, the inductor having an elongated body with interconnected conducting sections, an average width, an average ac signal voltage across the body, the method comprising:

(a) decreasing the width of a section of the body of the inductor relative to the average width whereat the ac voltage signal on the section is relatively higher than the average ac signal voltage across the inductor body; and

(b) increasing the width of another section of the body of the inductor whereat the ac voltage signal on the other section is relatively lower than the average ac signal voltage across the inductor body.

8. The method of claim 7 wherein decreasing the width of the section of the body of the inductor relative to the average width comprises decreasing the width of the section of the body of the inductor relative to the average width in a series of steps.

9. The method of claim 7 wherein decreasing the width of the section of the body of the inductor relative to the average width comprises decreasing the width of the section of the body of the inductor relative to the average width using a tapered line.

10. The method of claim 7 wherein decreasing the width of the section of the body of the inductor relative to the average width comprises decreasing the width of the section of the body of the inductor relative to the average width using a meandering line.

11. The method of claim 7 wherein increasing the width of the other section of the body of the inductor relative to the average width comprises increasing the width of the other section of the body of the inductor relative to the average width in a series of steps.

12. The method of claim 7 wherein increasing the width of the other section of the body of the inductor relative to the average width comprises increasing the width of the section of the body of the inductor relative to the average width using a tapered line.

13. The method of claim 7 wherein increasing the width of the other section of the body of the inductor relative to the average width comprises increasing the width of the section of the body of the inductor relative to the average width using a meandering line.

14. A low loss inductor for deposition on a substrate of an integrated circuit that processes voltage signals, comprising:

an elongated conductive body deposed on the substrate and having

first and second ends,

conductive sections disposed between the ends, and

wherein a width of the conductive sections is greater where an average ac signal voltage relative to the substrate is determined to be lower than the average ac signal voltage across the body.

15. The low loss inductor of claim 14 wherein the width of the conductive sections varies as a series of steps.

16. The low loss inductor of claim 14 wherein the width of the conductive sections varies as a tapered line.

17. The low loss inductor of claim 14 wherein the width of the conductive sections varies as a meandering line.

18. The low loss inductor of claim 14 wherein the width of the conductive sections is lesser where the average ac signal voltage relative to the substrate is determined to be higher than the average ac signal voltage across the body.

19. The low loss inductor of claim 18 wherein the width of the conductive sections as a series of steps.

20. The low loss inductor of claim 14 wherein the width of the conductive sections varies as a tapered line.