Frequency-timing control loop for wireless communication systems

• US 6,738,608 B2
• Filed: 02/12/2002
• Issued: 05/18/2004
• Est. Priority Date: 02/12/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Black, Peter J., Sindhushayana, Nagabhushana T.
• Primary Examiner(s): Tran, Congvan
• Application Number:
  US10/075,578
• Publication Number:
  US 20030186666A1
• Time in Patent Office: 826 Days
• Field of Search: 455/260, 455/258, 455/255, 455/70, 455/71, 455/256, 455/230, 455/290.1, 455/161.1, 375/306, 375/219, 375/316, 375/324, 375/327, 375/335, 375/376
• US Class Current: 455/260
• CPC Class Codes: H04B 2001/70706 using a code tracking loop, e.g. a delay locked loop
• CPC Class Codes: H04L 2027/0028 at passband only
• CPC Class Codes: H04L 2027/0036 using a recovered symbol clock
• CPC Class Codes: H04L 2027/0055 single phase
• CPC Class Codes: H04L 2027/0065 Frequency error detectors H04L2027/0067 takes precedence
• CPC Class Codes: H04L 27/0014 Carrier regulation of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657
• CPC Class Codes: H04L 7/0025 interpolation of clock signal
• CPC Class Codes: H04L 7/0054 Detection of the synchronisation error by features other than the received signal transition by means of signal transition H04L7/033

Abstract

A frequency-timing control loop comprising (1) a frequency control loop to acquire and track the frequency of a given signal instance in a received signal and (2) a timing control loop to acquire and track the timing of the same signal instance. The timing control loop processes data samples for the received signal to provide a first control indicative of timing error in the data samples for the signal instance. The frequency control loop includes (1) a frequency discriminator used to derive a second control indicative of frequency error in the data samples for the signal instance, and (2) a loop filter used to filter the first and second controls to provide a third control. This third control is used to adjust the frequency and phase of a periodic signal, which is used (directly or indirectly) to downconvert and digitize the received signal to provide the data samples.

Claims

1. A frequency-timing control loop comprising:

a timing control loop operative to process data samples for a received signal to derive a first control indicative of timing error in the data samples for a particular signal instance in the received signal; and

a frequency control loop coupled to the timing control loop and including

a frequency discriminator operative to derive a second control indicative of frequency error in the data samples for the signal instance, and

a first loop filter operative to filter the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

2. The frequency-timing control loop of claim 1, wherein the third control is used to adjust the frequency of a local oscillator (LO) signal used to downconvert the received signal from RF to baseband.

3. The frequency-timing control loop of claim 2, wherein the third control is further used to adjust the phase of a clock signal used to digitize the downconverted signal to provide the data samples.

4. The frequency-timing control loop of claim 3, wherein the clock signal is derived by dividing the LO signal.

5. The frequency-timing control loop of claim 3, wherein the phase of the clock signal is adjusted to maximize signal-to-interference-and-noise ratio (SINR) of the data samples for the signal instance.

6. The frequency-timing control loop of claim 1, wherein the first control from the timing control loop is enabled if the signal instance has a signal strength exceeding a particular threshold.

7. The frequency-timing control loop of claim 1, wherein the first control from the timing control loop is derived based on a non-linear function.

8. The frequency-timing control loop of claim 7, wherein the first control is set to zero if the timing error is less than a first threshold.

9. The frequency-timing control loop of claim 7, wherein the first control is set to a particular maximum value if the timing error exceeds a second threshold.

10. The frequency-timing control loop of claim 7, wherein the first control is set to zero if the timing error is less than a first threshold and to a particular maximum value if the timing error exceeds a second threshold, and is linearly related to the timing error if the timing error is between the first and second thresholds.

11. The frequency-timing control loop of claim 1, wherein the timing control loop includes

a timing discriminator operative to process the data samples to provide a timing error metric, and

a second loop filter operative to filter the timing error metric.

12. The frequency-timing control loop of claim 11, wherein the timing discriminator is implemented as an early-late detector.

13. The frequency-timing control loop of claim 11, wherein the timing control loop further includes

a transfer gain element operative to apply a non-linear function to an output of the second loop filter to provide the first control.

14. The frequency-timing control loop of claim 11, wherein the second loop filter is implemented as a second-order loop filter.

15. The frequency-timing control loop of claim 1, wherein the first loop filter is implemented as a first-order loop filter.

16. The frequency-timing control loop of claim 1, wherein a tracking bandwidth for the first control is at least a factor of two smaller than a tracking bandwidth for the second control.

17. A frequency-timing control loop comprising:

a timing control loop including

a timing discriminator operative to process data samples for a received signal to provide a timing error metric,

a first loop filter operative to filter the timing error metric, and

a transfer gain element operative to apply a non-linear function to an output of the first loop filter to provide a first control indicative of timing error in the data samples for a particular signal instance in the received signal; and

a frequency control loop coupled to the timing control loop and including

a frequency discriminator operative to derive a second control indicative of frequency error in the data samples for the signal instance, and

a second loop filter operative to filter the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

18. In a wireless communication system, a method of acquiring and tracking frequency and timing of a signal instance in a received signal, comprising:

first processing data samples for the received signal to provide a first control indicative of timing error in the data samples for the signal instance;

second processing the data samples to provide a second control indicative of frequency error in the data samples for the signal instance; and

filtering the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

19. The method of claim 18, wherein the second processing includes

processing the data samples with a frequency discriminator to provide the second control.

20. The method of claim 18, wherein the first processing includes

processing the data samples with a timing discriminator to provide a timing error metric, and

filtering the timing error metric with a first loop filter.

21. The method of claim 20, wherein the first processing further includes

applying a non-linear function to an output of the first loop filter to provide the first control.

22. The method of claim 18, further comprising:

estimating a signal strength of the signal instance; and

enabling the first control if the estimated signal strength exceeds a particular threshold.

23. The method of claim 18, wherein a plurality of signal instances in the received signal are concurrently processed, and wherein the frequency and phase of the periodic signal are adjusted to achieve frequency and timing lock for a single selected signal instance.

24. The method of claim 23, wherein the selected signal instance has a highest signal strength among the plurality of signal instances.

25. The method of claim 18, further comprising:

adjusting the frequency of a local oscillator (LO) signal based on the third control, wherein the LO signal is used to downconvert the received signal from RF to baseband.

26. The method of claim 25, further comprising:

adjusting the phase of a clock signal based on the third control, wherein the clock signal is used to digitize the downconverted signal to provide the data samples.

27. The method of claim 26, further comprising:

dividing the LO signal to provide the clock signal.

28. A frequency-timing control loop comprising:

means for deriving a first control indicative of timing error in data samples for a particular signal instance in a received signal;

means for deriving a second control indicative of frequency error in the data samples for the signal instance; and

means for filtering the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

29. An integrated circuit comprising:

a timing control loop operative to process data samples for a received signal to derive a first control indicative of timing error in the data samples for a particular signal instance in the received signal; and

a frequency control loop coupled to the timing control loop and including

a frequency discriminator operative to derive a second control indicative of frequency error in the data samples for the signal instance, and

a first loop filter operative to filter the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

30. The integrated circuit of claim 29, further comprising:

a detector operative to estimate a signal strength of the signal instance, and wherein the first control is enabled if the estimated signal strength exceeds a particular threshold.

31. A receiver unit in a wireless communication system, comprising:

a front-end unit operative to process a received signal to provide data samples; and

a digital signal processor including a frequency-timing control loop operative to derive a first control indicative of timing error in the data samples for a particular signal instance in the received signal, derive a second control indicative of frequency error in the data samples for the signal instance, and filter the first and second controls to provide a third control for adjusting frequency and phase of a periodic signal used to process the received signal to provide the data samples.

32. The receiver unit of claim 31, further comprising:

a signal generator operative to adjust the frequency of a local oscillator (LO) signal based on the third control, wherein the LO signal is used by the front-end unit to downconvert the received signal from RF to baseband.

33. The receiver unit of claim 32, wherein the signal generator is further operative to adjust the phase of a reference signal based on the third control, wherein the reference signal is used to derive a clock signal used by the front-end unit to digitize the downconverted signal to provide the data samples.

34. A terminal comprising the receiver unit of claim 31.

35. A base station comprising the receiver unit of claim 31.

36. A receiver apparatus in a wireless communication system, comprising:

means for downconverting a received signal with a local oscillator (LO) signal to provide a downconverted signal;

means for digitizing the downconverted signal with a clock signal to provide data samples;

means for deriving a first control indicative of timing error in the data samples for a particular signal instance in the received signal;

means for deriving a second control indicative of frequency error in the data samples for the signal instance;

means for filtering the first and second controls to provide a third control;

means for adjusting a frequency of the LO signal based on the third control; and

means for adjusting a phase of the clock signal based on the third control.

37. A terminal comprising

a signal generator operative to provide a local oscillator (LO) signal and a reference signal;

a clock generator operative to provide a clock signal based on the reference signal;

a front-end unit operative to downconvert a received signal based on the LO signal and to digitize the downconverted signal based on the clock signal to provide data samples; and

a digital signal processor including a frequency-timing control loop operative to derive a first control indicative of timing error in the data samples for a particular signal instance in the received signal, derive a second control indicative of frequency error in the data samples for the signal instance, and filter the first and second controls to provide a third control, wherein the frequency of the LO signal and the phase of the clock signal are both adjusted based on the third control.