System for real-time control of semiconductor wafer polishing

• US 6,739,944 B2
• Filed: 11/19/2002
• Issued: 05/25/2004
• Est. Priority Date: 08/25/1993
• Status: Expired due to Fees

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Sandhu, Gurtej S., Doan, Trung Tri
• Primary Examiner(s): Eley, Timothy V.
• Application Number:
  US10/299,271
• Publication Number:
  US 20030073384A1
• Time in Patent Office: 553 Days
• Field of Search: 437/7, 437/8, 437/225, 437/249, 451/5, 451/6, 451/7, 451/8, 451/9, 451/10, 451/41, 451/285, 451/59, 451/286, 451/63, 451/287, 451/288, 451/289, 451/290
• US Class Current: 451/5
• CPC Class Codes: B23Q 15/013 Control or regulation of feed movement B23Q15/12 takes precedence
• CPC Class Codes: B23Q 15/12 Adaptive control, i.e. adjusting itself to have a performance which is optimum according to a preassigned criterion
• CPC Class Codes: B24B 13/015 of television picture tube viewing panels, headlight reflectors or the like
• CPC Class Codes: B24B 37/013 Devices or means for detecting lapping completion
• CPC Class Codes: B24B 37/015 Temperature control
• CPC Class Codes: B24B 37/107 in a rotary movement only, about an axis being stationary during lapping
• CPC Class Codes: B24B 37/12 Lapping plates for working plane surfaces
• CPC Class Codes: B24B 37/205 provided with a window for inspecting the surface of the work being lapped
• CPC Class Codes: B24B 49/003 involving acoustic means
• CPC Class Codes: B24B 49/02 according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent B24B49/12 takes precedence
• CPC Class Codes: B24B 49/04 involving measurement of the workpiece at the place of grinding during grinding operation
• CPC Class Codes: B24B 49/10 involving electrical means B24B49/02, B24B49/08 take precedence
• CPC Class Codes: B24B 49/12 involving optical means
• CPC Class Codes: B24B 57/02 for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
• CPC Class Codes: G05B 19/404 characterised by control arrangements for compensation, e.g. for backlash, overshoot, tool offset, tool wear, temperature, machine construction errors, load, inertia G05B19/19, G05B19/41 take precedence
• CPC Class Codes: G05B 2219/34403 RTI real time, kernel, processing
• CPC Class Codes: G05B 2219/37398 Thickness
• CPC Class Codes: G05B 2219/37602 Material removal rate
• CPC Class Codes: G05B 2219/45026 Circuit board, pcb
• CPC Class Codes: G05B 2219/45199 Polish
• CPC Class Codes: G05B 2219/45232 : CMP chemical mechanical polishing of wafer
• CPC Class Codes: G05B 2219/49052 : Accessory, coolant
• CPC Class Codes: G05B 2219/49057 : Controlling temperature of workpiece, tool, probe holder

Abstract

A system for polishing a semiconductor wafer, the system comprising a wafer polishing assembly for polishing a face of a semiconductor wafer at a polishing rate and a polishing uniformity, the wafer polishing assembly including a platen subassembly defining a polishing area, and a polishing head selectively supporting a semiconductor wafer and holding a face of the semiconductor wafer in contact with the platen subassembly to polish the wafer face; and a controller selectively adjusting one of a plurality of adjustable polishing parameters during polishing of the wafer.

Claims

1. A process for polishing a wafer comprising acts of:

sensing an aspect of wafer polishing during wafer polishing; and

selectively isolating and changing polishing rates of specific regions of the wafer in response to said sensing during polishing while globally polishing the entire wafer.

2. The process of claim 1, wherein the act of selectively isolating and changing comprises modifying an operational parameter of polishing, wherein the operational parameter is chosen from a group consisting of:

platen rotational velocity, wafer rotational velocity, wafer polishing path, wafer speed along a platen surface, downward force exerted on the wafer, slurry composition, slurry flow rate, and temperature at a surface of the wafer.

3. The process of claim 1, further comprising the act of heating the wafer during polishing.

4. The process of claim 1, wherein the act of polishing comprises chemical-mechanical polishing.

5. The process of claim 1, wherein the act of polishing comprises chemical-mechanical polishing and further comprising the act of heating the wafer during polishing.

6. The process of claim 1, wherein the act of globally polishing the entire wafer comprises planarizing the wafer.

7. The process of claim 1, wherein the act of polishing is carried out to remove high topography, surface defects.

8. The process of claim 1, wherein the act of polishing comprises chemical mechanical planarization.

9. The process of claim 1, wherein the act of polishing comprises chemical mechanical planarization and further comprising the act of heating the wafer during polishing.

10. A process for planarizing a wafer comprising acts of:

sensing an aspect of wafer polishing during wafer planarizing; and

selectively isolating and changing the planarizing rates of specific regions of the wafer in response to said sensing during planarizing while globally planarizing the entire wafer.

11. The process of claim 10, wherein the act of selectively isolating and changing comprises modifying an operational parameter of planarizing, wherein the operational parameter is chosen from a group consisting of:

platen rotational velocity, wafer rotational velocity, wafer planarizing path, wafer speed along a platen surface, downward force exerted on the wafer, slurry composition, slurry flow rate, and temperature at a surface of the wafer.

12. The process of claim 10 further comprising the act of heating the wafer during planarizing.

13. The process of claim 10, wherein the act of planarizing comprises chemical mechanical polishing.

14. The process of claim 10, wherein the act of planarizing comprises chemical mechanical polishing and further comprising heating the wafer during polishing.

15. The process of claim 10, wherein the act of planarizing is carried out to remove high topography, surface defects.

16. The process of claim 10, wherein the act of planarizing comprises chemical mechanical planarizing.

17. The process of claim 10, wherein the act of planarizing comprises chemical mechanical planarization and further comprising heating the wafer during planarizing.

18. The process of claim 10, wherein the act of planarizing comprises polishing a semiconductor wafer.

19. A process for planarizing a wafer comprising acts of:

sensing an aspect of wafer polishing during wafer polishing; and

selectively isolating and changing the polishing rates of specific regions of the wafer in response to said sensing during polishing while globally polishing the entire wafer; and

after the polishing, singulating the wafer to provide individual integrated circuits.

20. The process of claim 19, wherein the act of selectively isolating and changing comprises modifying an operational parameter of polishing, wherein the operational parameter is chosen from a group consisting of:

platen rotational velocity, wafer rotational velocity, wafer polishing path, wafer speed along a platen surface, downward force exerted on the wafer, slurry composition, slurry flow rate, and temperature at a surface of the wafer.

21. The process of claim 19 further comprising the act of heating the wafer during polishing.

22. The process of claim 19, wherein the act of polishing comprises chemical mechanical polishing.

23. The process of claim 19, wherein the act of polishing comprises chemical mechanical polishing and further comprising the act of heating the wafer during polishing.

24. The process of claim 19, wherein the act of polishing is carried out to remove high topography, surface defects.

25. The process of claim 19, wherein the act of polishing comprises chemical mechanical planarization.

26. The process of claim 19, wherein the act of polishing comprises chemical mechanical planarization and further comprising the act of heating the wafer during polishing.

27. The process of claim 19, wherein the act of polishing comprises polishing a semiconductor wafer.