Method of fabricating contact holes in a semiconductor device

• US 6,740,599 B2
• Filed: 09/04/2001
• Issued: 05/25/2004
• Est. Priority Date: 11/27/1995
• Status: Expired due to Fees

• Current Assignee: Shunpei Yamazaki, Takeshi Fukunaga
• Original Assignee: Shunpei Yamazaki, Takeshi Fukunaga
• Inventors: Fukunaga, Takeshi, Yamazaki, Shunpei
• Primary Examiner(s): Thomas, Tom
• Assistant Examiner(s): RICHARDS, N DREW
• Application Number:
  US09/946,733
• Publication Number:
  US 20020006690A1
• Time in Patent Office: 994 Days
• Field of Search: 438/738, 438/739, 438/742, 438/713, 438/700, 438/725, 438/623, 438/638
• US Class Current: 438/739
• CPC Class Codes: H01J 2217/49 Display panels, e.g. not making use of alternating current H01J2211/10 takes precedence
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device having reliable electrode contacts. First, an interlayer dielectric film is formed from a resinous material. Then, window holes are formed. The interlayer dielectric film is recessed by oxygen plasma. This gives rise to tapering window holes. This makes it easy to make contacts even if the circuit pattern is complex.

Claims

1. A method of fabricating a semiconductor device, comprising:

forming a dielectric film containing silicon;

forming a second dielectric film from a resinous material over said dielectric film containing silicon to thereby form a multilayer film comprising said dielectric film containing silicon and said second dielectric film;

forming contact holes in said multilayer film using a mask comprising a metal;

isotropically etching said resinous material, using said mask comprising said metal and using a means for selectively etching said resinous material, to widen openings in said contact holes;

removing said mask comprising said metal; and

forming a conductive layer to become at least an electrode in said contact holes after said removing of said mask comprising said metal.

2. A method of fabricating a semiconductor device, comprising:

forming a dielectric film containing silicon;

forming a second dielectric film from a resinous material over said dielectric film containing silicon to thereby form a multilayer film of said dielectric film containing silicon and said second dielectric film;

forming a metal film over said multilayer film;

selectively etching said metal film;

forming contact holes in said multilayer film, using the etched metal film as a mask; and

isotropically etching said resinous material, using the etched metal film as a mask and using a means for selectively etching said resinous material;

removing the etched metal film; and

forming a conductive layer to become at least an electrode in said contact holes after said removing of the etched metal film.

3. The method of claim 2 wherein said step of forming the contact holes and said step of isotropically etching said resinous material are performed in succession by drying etching without exposure to atmosphere.

4. A method of fabricating a semiconductor device, comprising:

forming a dielectric film containing silicon;

forming a second dielectric film comprising a resinous material over said dielectric film containing silicon to thereby form a multilayer film comprising said dielectric film containing silicon and said second dielectric film;

forming a contact hole in said multilayer film using a mask comprising a metal; and

isotropically and selectively etching said resinous material using said mask comprising said metal to widen an opening in said contact hole;

removing said mask comprising said metal; and

forming a conductive layer to become at least an electrode in said contact hole after said removing of said mask comprising said metal.

5. A method of fabricating a semiconductor device, comprising:

forming a dielectric film containing silicon;

forming a second dielectric film comprising a resinous material over said dielectric film containing silicon to thereby form a multilayer film of said dielectric film containing silicon and said second dielectric film;

forming a metal film over said multilayer film;

selectively etching said metal film;

forming a contact hole in said multilayer film, using said etched metal film as a mask;

isotropically and selectively etching said resinous material, using the etched metal film as a mask;

removing the etched metal film; and

forming a conductive layer to become at least an electrode in said contact hole after said removing of the etched metal film.

6. The method of claim 5 wherein said step of forming the contact hole and said step of isotropically and selectively etching said resinous material are performed in succession by drying etching without exposure to atmosphere.