Metal trace with reduced RF impedance resulting from the skin effect

• US 6,740,956 B1
• Filed: 08/15/2002
• Issued: 05/25/2004
• Est. Priority Date: 08/15/2002
• Status: Expired due to Fees

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Johnson, Peter, Hopper, Peter J., Hwang, Kyuwoon, Drury, Robert, Mian, Michael
• Primary Examiner(s): Nguyen, Tuan H.
• Application Number:
  US10/219,896
• Time in Patent Office: 649 Days
• Field of Search: 257/531, 257/499, 257/528, 257/529, 257/532, 257/774, 438/637, 336/200
• US Class Current: 257/528
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/5283 Cross-sectional geometry
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

The RF impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fingers that extend away from the base region. When formed to have a number of loops, the metal trace forms an inductor with an increased Q.

Claims

1. A semiconductor device comprising:

a layer of insulation material formed over a semiconductor substrate; and

a metal trace formed in the layer of insulation material, the metal trace having a base region and a plurality of spaced-apart fingers that extend away from a bottom surface of the base region, a top surface of the metal trace and a top surface of the insulation material lying in different horizontal planes, the metal trace formlng a number of loops such that the base region is formed in a number of loops.

2. The semiconductor device of claim 1 wherein the loops lie substantially in a same plane.

3. The semiconductor device of claim 1 wherein the metal trace has a first end and a second end.

4. The semiconductor device of claim 3 wherein the second end is connected to a via.

5. The semiconductor device of claim 4 and further comprising a metal trace segment that makes an electrical connection with the via, and lies under a portion of the loops.

6. The semiconductor device of claim 5 wherein the metal trace segment has a plurality of fingers that extend away from a bottom surface of the metal trace segment.

7. The semiconductor device of claim 5 wherein the metal trace segment has a width, a length that is substantially greater than the width, and a plurality of fingers that extend away from a bottom surface of the metal trace segment and run from a first end of the metal trace segment to a second end of the metal trace segment.

8. The semiconductor device of claim 7 wherein the fingers run continuously from the first end of the metal trace segment to the second end of the metal trace segment.

9. The semiconductor device of claim 1 wherein the fingers are formed in a number of loops.

10. A semiconductor device comprising:

a layer of insulation material formed over a semiconductor substrate; and

a metal trace formed in the layer of insulation material, the metal trace having a width, a length that is substantially greater than the width, and a plurality of spaced-apart fingers that extend away from a bottom side of the metal trace and run from a first end of the metal trace to a second end of the metal trace along the length, a top surface of the metal trace and a top surface of the insulation material lying in different horizontal planes.

11. The semiconductor device of claim 10 wherein the metal trace forms a number of loops.

12. The semiconductor device of claim 11 wherein the loops lie substantially in a same plane.

13. The semiconductor device of claim 10 wherein the second end is connected to a via.

14. The semiconductor device of claim 13 and further comprising a metal trace segment that makes an electrical connection with the via, and lies lower than the metal trace.

15. The semiconductor device of claim 14 wherein the metal trace segment has a plurality of fingers that extend away from a bottom surface of the metal trace segment.

16. The semiconductor device of claim 14 wherein the metal trace segment has a width, a length that is substantially greater than the width, and a plurality of fingers that extend away from a bottom surface of the metal trace segment and run from a first end to a second end of the metal trace segment along the length.

17. The semiconductor device of claim 10 wherein the fingers run continuously from the first end to the second end.