Method of providing an interface to a plurality of peripheral devices using bus adapter chips

• US 6,742,069 B2
• Filed: 10/30/2001
• Issued: 05/25/2004
• Est. Priority Date: 05/13/1997
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Amdahl, Carlton G., Smith, Dennis H., Schiro, Don, Papa, Stephen E. J., Agneta, Don, Henderson, Michael G.
• Primary Examiner(s): Lefkowitz, Sumati
• Application Number:
  US10/016,296
• Publication Number:
  US 20030009613A1
• Time in Patent Office: 938 Days
• Field of Search: 710/305-315, 710/100, 710/300-304, 361/679-686, 361/728-804
• US Class Current: 710/302
• CPC Class Codes: G06F 1/20 Cooling means
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 11/0748 in a remote unit communicating with a single-box computer node experiencing an error/fault remote testing G06F11/2294
• CPC Class Codes: G06F 11/0766 Error or fault reporting or storing
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/2294 by remote test
• CPC Class Codes: G06F 11/328 Computer systems status display G06F11/327 takes precedence
• CPC Class Codes: G06F 11/3466 Performance evaluation by tracing or monitoring
• CPC Class Codes: G06F 11/3476 Data logging G06F11/14, G06F11/2205 take precedence
• CPC Class Codes: G06F 11/3495 for systems
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 13/4081 Live connection to bus, e.g. hot-plugging current or voltage limitation during live insertion H02H9/004
• CPC Class Codes: G06F 13/409 Mechanical coupling back panels H05K7/1438
• CPC Class Codes: G06F 21/305 by remotely controlling device operation
• CPC Class Codes: G06F 21/31 User authentication
• CPC Class Codes: G06F 2201/86 Event-based monitoring
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/4411 : Configuring for operating with peripheral devices; Loading of device drivers
• CPC Class Codes: H02P 7/285 : controlling armature supply only
• CPC Class Codes: H04L 12/12 : Arrangements for remote connection or disconnection of substations or of equipment thereof
• CPC Class Codes: H04L 41/0213 : Standardised network management protocols, e.g. simple network management protocol [SNMP]
• CPC Class Codes: H04L 41/0659 : by isolating or reconfiguring faulty entities
• CPC Class Codes: H04L 41/0806 : for initial configuration or provisioning, e.g. plug-and-play
• CPC Class Codes: H04L 41/12 : Discovery or management of network topologies
• CPC Class Codes: H04L 41/22 : comprising specially adapted graphical user interfaces [GUI]
• CPC Class Codes: H04L 43/00 : Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 49/90 : Buffering arrangements
• CPC Class Codes: H04L 49/9063 : Intermediate storage in different physical parts of a node or terminal
• CPC Class Codes: H04L 49/9073 : Early interruption upon arrival of a fraction of a packet
• CPC Class Codes: H04L 67/1001 : for accessing one among a plurality of replicated servers
• CPC Class Codes: H05K 7/1492 : having electrical distribution arrangements, e.g. power supply or data communications
• CPC Class Codes: H05K 7/207 : Thermal management, e.g. cabinet temperature control
• CPC Class Codes: H05K 7/20736 : within cabinets for removing heat from server blades
• CPC Class Codes: Y02D 30/50 : in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adapter chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one of the network interface modules is removed.

Claims

1. A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of interface modules comprising:

routing an I/O bus having a first format from said central processing unit to primary sides of a plurality of bus adapter chips;

routing an I/O bus of said first format from secondary sides of said bus adapter chips to respective ones of said interface modules, wherein the bus adapter chips comprise electrical hardware which provides arbitered access along the I/O buses and wherein the steps of routing the I/O buses to and from bus adapter chips comprises electrically isolating the CPU from electrical disruption when one of the interface modules is removed.

2. The method of claim 1, wherein each of said plurality of interface modules is a network interface module.

3. The method of claim 1, further including mounting a plurality of interface cards in interface card slots in said plurality of interface modules.

4. The method of claim 1, further including removably mounting said interface modules on a chassis.

5. The method of claim 4, wherein the act of removably mounting the interface module comprises the act of mounting said interface module such that said interface module may be removed from said chassis and disconnected electrically from said CPU or mounted on said chassis and connected electrically to said CPU without powering down said CPU.

6. A method of electrically coupling a plurality of interface modules to a CPU such that at least one of the interface modules can be disconnected without powering down the remaining interface modules or the CPU, said method comprising:

mounting a CPU on a chassis;

removably mounting a plurality of interface modules to said chassis;

mounting a backplane printed circuit board on the chassis, wherein the backplane printed circuit board comprises at least one bus adapter chip for each of the plurality of interface modules, and wherein each bus adapter chip has a primary side and a secondary side, and wherein each bus adapter chip has electrical hardware that isolates the primary side from the secondary side when the corresponding interface module has been removed from the chassis;

routing an I/O bus on said backplane printed circuit board from the primary side of the at least one bus adapter chip to the CPU; and

routing an I/O bus on said backplane printed circuit board from the secondary side of the at least one bus adapter chip to the corresponding one of the interface modules, wherein the at least one bus adapter chip comprises electrical hardware providing arbitered access and speed matching along the I/O busses.

7. The method of claim 6, wherein each of said plurality of interface modules is a network interface module.

8. The method of claim 6, wherein the I/O busses comprise peripheral component interconnect (PCI) busses.

9. The method of claim 8, wherein said act of mounting the plurality of interface modules to the backplane printed circuit board comprises the acts of:

connecting a 180 pin female connector on said backplane printed circuit board with a 180 pin male connector on a interface module of said plurality of interface modules; and

connecting a 360 pin female connector on said backplane printed circuit board with a 360 pin male connector on said CPU.

10. The method of claim 6, further including mounting a plurality of interface cards in interface card slots in said plurality of interface modules.

11. The method of claim 10, wherein said printed circuit board powers down said interface modules including said interface cards thereon.

12. A method of electrically coupling a plurality of interface modules to a CPU such that at least one of the interface modules can be removed without powering down the remaining interface modules or the CPU, said method comprising:

mounting a backplane printed circuit board on the back of a chassis;

connecting a CPU module to said backplane printed circuit board when mounting a CPU module on said chassis; and

removably mounting a plurality of interface modules to the backplane printed circuit board; and

connecting the plurality of interface modules to the backplane printed circuit board with bus adapter chips configured to provide arbitrated access to said interface modules and electrical termination and isolation between the interface modules and the CPU module when a interface module is removed.

13. The method of claim 12, wherein each of said plurality of interface modules is a network interface module.

14. The method of claim 12, where said act of connecting said interface module to said backplane printed circuit board comprises the act of connecting a high density connector of said interface module to a high density connector on said backplane printed circuit board.

15. The method of claim 14, further including mounting a plurality of interface cards in interface card slots in said plurality of interface modules.