Rate matching and channel interleaving for a communications system
First Claim
1. A method of matching a rate of data bits, in a matrix of data bits interleaved by a predetermined interleaving process, to a desired rate by deletion of redundant data bits or repetition of data bits derived from the matrix, including the steps of:
- determining in a non-interleaved matrix of said data bits a pattern of bits to be deleted or repeated to provide said desired data rate;
interleaving an address of each bit in said pattern to produce a respective address of the bit in the matrix of interleaved data bits; and
deleting or repeating the respective bit in the interleaved data bits in dependence upon the respective address.
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Accused Products
Abstract
Matching a rate of data bits, in a matrix of data bits interleaved by a predetermined interleaving process, to a desired rate by deletion of redundant data bits or repetition of data bits derived from the matrix. It includes steps of determining in a non-interleaved matrix of the data bits a pattern of bits to be deleted or repeated to provide the desired data rate, decoding an address of each bit in said pattern in a manner inverse to the interleaving process to product a respective address of the bit in the matrix of interleaved data bits, and deleting or repeating the respective bit in the interleaved data bits in dependence upon the respective address. The address decoding is performed in the same manner as a coding of addresses for producing the interleaved data bits from the non-interleaved matrix of the data bits.
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Citations
13 Claims
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1. A method of matching a rate of data bits, in a matrix of data bits interleaved by a predetermined interleaving process, to a desired rate by deletion of redundant data bits or repetition of data bits derived from the matrix, including the steps of:
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determining in a non-interleaved matrix of said data bits a pattern of bits to be deleted or repeated to provide said desired data rate;
interleaving an address of each bit in said pattern to produce a respective address of the bit in the matrix of interleaved data bits; and
deleting or repeating the respective bit in the interleaved data bits in dependence upon the respective address. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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5. A method as claimed in claim 4 wherein
fc(l)=ml+[Nr+1]mod2, where m is an integer. -
6. A method as claimed in claim 5 wherein m is approximately equal to Nr/Nc.
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7. A method as claimed in claim 4 wherein
fr(k)+2k+[Nc+1]mod2. -
8. A method as claimed in claim 4 wherein α
- r is the largest prime number less than Nr/log2(log2(Nr)).
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9. Rate matching apparatus arranged for carrying out a method as claimed in claim 1.
- 10. A method of interleaving data bits comprising permuting rows and columns of a matrix of Nr rows and Nc columns, in which data bits to be interleaved are represented row by row, in accordance with:
Specification