Magnetic memory having antiferromagnetically coupled recording layer

• US 6,751,074 B2
• Filed: 05/23/2003
• Issued: 06/15/2004
• Est. Priority Date: 09/16/1999
• Status: Expired due to Term

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kishi, Tatsuya, Saito, Yoshiaki, Inomata, Koichiro, Sagoi, Masayuki, Nakajima, Kentaro
• Primary Examiner(s): KLIMOWICZ, WILLIAM JOSEPH
• Application Number:
  US10/443,830
• Publication Number:
  US 20030197984A1
• Time in Patent Office: 389 Days
• Field of Search: 360/324.2, 360/315, 360/314, 365/158, 365/171, 365/173, 365/55, 365/97, 365/98, 365/100, 365/232, 257/421, 338/32.R, 324/207.21, 324/252
• US Class Current: 360/324.2
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 25/00 Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
• CPC Class Codes: G01R 33/093 using multilayer structures, e.g. giant magnetoresistance sensors thin magnetic films H01F10/00
• CPC Class Codes: G11B 5/3903 using magnetic thin film layers or their effects, the films being part of integrated structures
• CPC Class Codes: G11B 5/3909 Arrangements using a magnetic tunnel junction
• CPC Class Codes: G11C 11/15 using multiple magnetic layers G11C11/155 takes precedence
• CPC Class Codes: H01F 10/3254 the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
• CPC Class Codes: H01F 10/3263 the exchange coupling being symmetric, e.g. for dual spin valve, e.g. NiO/Co/Cu/Co/Cu/Co/NiO
• CPC Class Codes: H01F 10/3272 by use of anti-parallel coupled [APC] ferromagnetic layers, e.g. artificial ferrimagnets [AFI], artificial [AAF] or synthetic [SAF] anti-ferromagnets
• CPC Class Codes: H01F 10/3281 only by use of asymmetry of the magnetic film pair itself, i.e. so-called pseudospin valve [PSV] structure, e.g. NiFe/Cu/Co
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: Y10T 428/1121 Multilayer
• CPC Class Codes: Y10T 428/115 Magnetic layer composition

Abstract

A magnetoresistive element has a ferromagnetic double tunnel junction having a stacked structure of a first antiferromagnetic layer/a first ferromagnetic layer/a first dielectric layer/a second ferromagnetic layer/a second dielectric layer/a third ferromagnetic layer/a second antiferromagnetic layer. The second ferromagnetic layer that is a free layer consists of a Co-based alloy or a three-layered film of a Co-based alloy/a Ni—Fe alloy/a Co-based alloy. A tunnel current is flowed between the first ferromagnetic layer and the third ferromagnetic layer.

Claims

1. A magnetic memory device comprising:

a memory cell comprising a ferromagnetic double tunnel junction having a stacked structure of a first ferromagnetic layer/a first dielectric layer/a second ferromagnetic layer/a first nonmagnetic layer/a third ferromagnetic layer/a second nonmagnetic layer/a fourth ferromagnetic layer/a second dielectric layer/a fifth ferromagnetic layer;

the second, third and fourth ferromagnetic layers adjacent to each other being antiferromagnetically coupled through the nonmagnetic layers, magnetization of the first ferromagnetic layer and magnetization of the fifth ferromagnetic layer being pinned in the same direction, and a magnetization direction of the second and the fourth ferromagnetic layers and a magnetization direction of the first and the fifth ferromagnetic layers being substantially parallel or anti-parallel to each other when no current magnetic field is applied;

a bit line extending to a first direction; and

a word line extending to a second direction crossing the first direction.

2. The magnetic memory device according to claim 1 further comprising a transistor or a diode corresponding to the memory cell, wherein the memory cell and the transistor or diode are arrayed.

3. The magnetic memory device according to claim 1, wherein the first and fifth ferromagnetic layers consist of a Co-based alloy or a three-layered film of a Co-based alloy/a Ni-Fe alloy/a Co-based alloy.

4. The magnetic memory device according to claim 3, wherein a thickness of the Co-based alloy or the three-layered film of the Co-based alloy/the Ni-Fe alloy/the Co-based alloy is 1 to 5 nm.

5. A magnetic memory device comprising:

a memory cell comprising a ferromagnetic double tunnel junction having a stacked structure of a first antiferromagnetic layer/a first ferromagnetic layer/a first tunnel insulator/a second ferromagnetic layer/a first nonmagnetic layer/a third ferromagnetic layer/a second nonmagnetic layer/a fourth ferromagnetic layer/a second tunnel insulator/a fifth ferromagnetic layer/a second antiferromagnetic layer;

the second and third ferromagnetic layers being antiferromagnetically coupled through a first nonmagnetic layer; and

the third and fourth ferromagnetic layers being antiferromagnetically coupled through a second nonmagnetic layer, magnetization of the first ferromagnetic layer and magnetization of the fifth ferromagnetic layer being pinned in the same direction, and a magnetization direction of the second and the fourth ferromagnetic layers and a magnetization direction of the first and the fifth ferromagnetic layers being substantially parallel or anti-parallel to each other when no current magnetic field is applied;

a bit line extending to a first direction; and

a word line extending to a second direction crossing the first direction.

6. A magnetic memory device according to claim 5, further comprising a transistor or a diode corresponding to the memory cell, wherein the memory cell and the transistor or diode are arrayed.