Residential circuit arc detection

• US 6,751,528 B1
• Filed: 11/27/2000
• Issued: 06/15/2004
• Est. Priority Date: 11/27/2000
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Dougherty, John James
• Primary Examiner(s): Picard, Leo
• Assistant Examiner(s): JARRETT, RYAN A
• Application Number:
  US09/722,187
• Time in Patent Office: 1,296 Days
• Field of Search: 700/292, 700/293, 702/58-60, 324/536, 361/5, 361/63, 361/62, 361/93.1, 361/93.2, 361/100
• US Class Current: 700/293
• CPC Class Codes: G01R 31/333 Testing of the switching capacity of high-voltage circuit-breakers ; Testing of breaking capacity or related variables, e.g. post arc current or transient recovery voltage
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 1/0092 concerning the data processing means, e.g. expert systems, neural networks
• CPC Class Codes: H02H 3/52 responsive to the appearance of harmonics

Abstract

An electronically controlled circuit breaker for detecting arc and a method for detecting arc conditions are disclosed. The circuit breaker and method uses digital Fourier transformation on sampled line current signals and bins the even, odd, and fundamental transforms. Even arc signals and non-harmonic arc signals are calculated from the values in the bins and used within an expert arc algorithm which uses an accumulator to sum an increment based on whether the even arc signals and non harmonic arc signals exceed a fixed threshold. A trip signal is issued when the increment exceeds a predetermined value.

Claims

1. An electronically controlled circuit breaker comprising:

a line current sensor sensing line current signals;

a processor for determining the fundamental frequency of the current signals, wherein the processor processes a preselected number of multiples of the fundamental frequency, and squares and sums the multiples to yield even, odd, and fundamental values;

even, odd, and fundamental bins within the processor for receiving the even, odd, and fundamental values, wherein the processor processes even arc signals and non-harmonic arc signals from the even, odd, and fundamental values in the bins; and

,

an expert arc algorithm within the processor having an accumulator for calculating an incremental value based on even arc signal and non-harmonic arc signal input, and additionally wherein the processor applies an acceleration factor to the incremental value when both an even arc threshold and a non-harmonic arc threshold are exceeded by the even arc signal and the non-harmonic arc signal, respectively, and a fixed threshold for which to compare the incremental value;

wherein the processor issues a trip signal when the fixed threshold is exceeded by the incremental value.

2. The electronically controlled circuit breaker of claim 1 further comprising a pair of separable contacts and a solenoid.

3. The electronically controlled circuit breaker of claim 2 further comprising a bridge rectifier connected to the solenoid.

4. The electronically controlled circuit breaker of claim 3 further comprising a silicon controlled rectifier connected to the bridge rectifier, wherein the, silicon controlled rectifier receives the trip signal from the processor and energizes the solenoid to separate the separable contacts when a tripping condition occurs.

5. The electronically controlled circuit breaker of claim 1 further comprising a neutral sensor.

6. The electronically controlled circuit breaker of claim 5 further comprising a dormant oscillator for receiving signals from the neutral sensor.

7. The electronically controlled circuit breaker of claim 1 further comprising a ground fault sensor for sensing differential current signals between line and neutral.

8. The electronically controlled circuit breaker of claim 7 further comprising means for detecting ground fault conditions, means for detecting overcurrent conditions, and means for detecting line current peaks for instantaneous protection.

9. The electronically controlled circuit breaker of claim 8 further comprising a logical OR circuit for receiving trip condition notification from any of the means for detecting ground fault conditions, means for detecting overcurrent conditions, means for detecting line current peaks, and the expert arc algorithm, wherein, upon receipt of a trip condition notification, the logical OR circuit sends the trip signal.

10. The electronically controlled circuit breaker of claim 1 further comprising a conditioning circuit for splitting the line current signals into first signals and second signals.

11. The electronically controlled circuit breaker of claim 10 further comprising a high pass filter for passing amplified first signals.

12. The electronically controlled circuit breaker of claim 11 further comprising an analog to digital converter for converting the current signals into binary form.

13. The electronically controlled circuit breaker of claim 1 wherein the processor decreases the incremental value if neither the even arc threshold nor the non-harmonic arc threshold is exceeded.

14. The electronically controlled circuit breaker of claim 13 wherein the processor decreases the incremental value by a linear factor when neither the even arc threshold nor the non-harmonic threshold is exceeded.

15. The electronically controlled circuit breaker of claim 1 wherein the processor multiplies the acceleration factor to a sum of the even arc signal and the non-harmonic arc signal when both the even arc threshold and the non-harmonic arc threshold are exceeded.

16. An electronically controlled circuit breaker comprising:

a line current sensor sensing line current signals;

a processor for determining the fundamental frequency of the current signals, wherein the processor processes a preselected number of multiples of the fundamental frequency, and squares and sums the multiples to yield even, odd, and fundamental values;

even, odd, and fundamental bins within the processor for receiving the even, odd, and fundamental values, wherein the processor processes even arc signals and non-harmonic arc signals from the even, odd, and fundamental values in the bins; and

,

an expert arc algorithm within the processor having an accumulator for calculating an incremental value based on even arc signal and non-harmonic arc signal input and a fixed threshold for which to compare the incremental value;

wherein the incremental value is calculated using the equation;

17. A method for detecting arc conditions in an electronically-controlled circuit breaker, the method comprising:

providing an even arc threshold and a non-harmonic arc threshold;

calculating an incremental value based on even arc signals and non-harmonic arc signals, wherein calculating the incremental value comprises comparing the even arc signals with the even arc threshold and the non-harmonic arc signals with the non-harmonic arc threshold, applying an acceleration factor to the incremental value if both the even arc threshold and the non-harmonic arc threshold are exceeded, and decreasing the incremental value if neither the even arc threshold nor the non-harmonic arc threshold is exceeded;

comparing the incremental value to a fixed threshold; and

,

issuing a trip signal indicating an arc fault condition when the fixed threshold is exceeded by the incremental value.

18. The method of claim 17 further comprising, prior to calculating an incremental value:

detecting line current signals with a line current sensor;

determining the fundamental frequency of the line current signals in a processor and processing a preselected number of harmonics of the fundamental frequency;

providing even, odd, and fundamental bins within the processor for binning the fundamental frequency, even harmonic, and odd harmonic values; and

,

processing even arc signals and non-harmonic arc signals from the values in the bins.

19. The method of claim 18 further comprising, subsequently detecting line current signals, splitting the line current signals with a conditioning circuit into first line current signals and second line current signals, amplifying the first line current signals, and passing the amplified first line current signals through a high pass filter.

20. The method of claim 19 further comprising creating a mean square value from the second line current signals.

21. The method of claim 20 wherein creating a mean square value from the second line current signals comprises squaring each second line current signal and summing each squared second line current signal with additional squared second line current signals for each cycle of line current signals.

22. The method of claim 20 further comprising comparing amplitudes of the even arc signals and the non-harmonic arc signals against a threshold which is a function of the mean square value.

23. The method of claim 17 further comprising detecting ground fault conditions, overcurrent conditions, and line current peaks, notifying a logical OR circuit of a trip condition, and issuing a trip signal upon notification of a trip condition from either ground fault conditions, overcurrent conditions, line current peaks, or arc fault conditions.

24. The method of claim 23 further comprising pulsing a silicon controlled rectifier upon receipt of the trip signal.

25. The method of claim 18 further comprising, subsequently providing even, odd, and fundamental bins, squaring each value in the bins and adding the squared value in the bins with additional squared values for each cycle of line current signals.

26. The method of claim 18 wherein processing even arc signals and non-harmonic arc signals from the values in the bins comprises passing even harmonic signals and non harmonic signals through multiple cycle integrators to average background noise.

27. The method of claim 17 wherein calculating the incremental value comprises employing the equation: