Si-Ge base heterojunction bipolar device

• US 6,756,604 B2
• Filed: 02/01/2002
• Issued: 06/29/2004
• Est. Priority Date: 01/27/2000
• Status: Expired due to Term

• Current Assignee: SIGE Semiconductor Incorporated (Skyworks Solutions Incorporated)
• Original Assignee: SIGE Semiconductor Incorporated (Skyworks Solutions Incorporated)
• Inventors: Kovacic, Stephen J., Houghton, Derek C.
• Primary Examiner(s): Fourson, George
• Assistant Examiner(s): PHAM, THANH V
• Application Number:
  US09/988,938
• Publication Number:
  US 20020061618A1
• Time in Patent Office: 879 Days
• Field of Search: 257/19, 257/65, 257/197, 257/355, 257/273, 257/583, 257/588, 257/591, 257/593, 257/596, 257/616
• US Class Current: 257/19
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 29/7378 comprising lattice mismatched active layers, e.g. SiGe strained layer transistors

Abstract

A bipolar transistor is disclosed that is produced using a sacrificial mesa disposed over a layer of Si and SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the Si and SiGe layer forming the transistor base. After an etching process, the sacrificial mesa is removed and the Si and SiGe layer is exposed, where an oppositely doped material is applied over top of the Si and SiGe layer to form an emitter. This makes it possible to realize a thin layer of Si and silicon germanium to serve as the transistor base. The transistor device formed using the sacrificial mesa results in the base layer Si and SiGe not being affected by a process of etching, as it otherwise would be using a conventional double-poly process, which results in a more repeatable bipolar transistor device yield.

Claims

1. A semiconductor device comprising:

a silicon substrate forming one of a collector and an emitter, the substrate being of a first conductivity type;

a layer of SiGe of a second conductivity type covering at least a portion of the silicon substrate;

a first layer of silicon of the second conductivity type at least substantially supported by and covering a substantial portion of the SiGe layer;

a first layer of polysilicon of the second conductivity type at least substantially supported by and covering a substantial portion of the first layer of silicon with the exception of a window region, the first layer of silicon entirely exposed within the window region and having its surface unaffected by a process of etching within the window region, the first layer of silicon forming a base terminal of the transistor; and

,

a second layer of polysilicon of the first conductivity type insulated from the first layer of polysilicon and contacting the entirely exposed and unetched first layer of silicon within the window region, said second layer of polysilicon forming the other of the collector and the emitter terminals of the transistor.

2. A semiconductor device as defined in claim 1 wherein the silicon substrate comprises n-type material and forms the collector.

3. A semiconductor device as defined in claim 2 wherein the layer of SiGe comprises p-type material, and wherein the second layer of polysilicon comprises n-type material and forms the emitter.

8. A semiconductor device according to claim 1, comprising an insulating material disposed between the two layers of polysilicon.

9. A semiconductor device according to claim 8, wherein the disposed insulating material is formed by reacting the first layer of polysilicon with a substance to form an insulating cover thereon.

10. A semiconductor device according to claim 8, wherein the disposed insulating material is formed by depositing an insulating material thereon.

11. A semiconductor device as defined in claim 1, wherein the fist layer of silicon and the SiGe layer have a substantially uniform thickness.

12. A semiconductor device as defined in claim 1, wherein the thickness of the SiGe layer covered by the second layer of polysilicon is of a substantially a same thickness and impurity concentration as the remaining portion of the layer of SiGe covering at least a region of the silicon layer.

4. A semiconductor device comprising:

a silicon layer of a first conductivity type;

a layer of SiGe of a second conductivity type covering at least a region of the silicon layer; and

,

a first layer of silicon of the second conductivity type at least substantially supported by and covering a substantial portion of the silicon and SiGe layer;

a first layer of polysilicon of the second conductivity type at least substantially supported by and covering a substantial portion of the first layer of silicon with the exception of a small window region, within which the first layer of silicon is entirely exposed; and

,

a second layer of polysilicon of the first conductivity type covering the small window region and entirely contacting the first layer of silicon within this small window region, where the first layer of silicon within the small window region has a surface unaffected by a process of etching.

5. A semiconductor device as defined in claim 4, wherein the silicon layer serves as a substrate and is substantially thicker than the layer of SiGe.

6. A semiconductor device as defined in claim 4 wherein the SiGe layer has a substantially uniform thickness.

7. A semiconductor device as defined in claim 4 wherein the thickness of the SiGe layer covered by the first layer of silicon is of a substantially same thickness and impurity concentration as the remaining portion of the layer of SiGe covering at least a region of the silicon layer.

13. A semiconductor device according to claim 4, comprising an insulating material disposed between the two layers of polysilicon.

14. A semiconductor device according to claim 13, wherein the disposed insulating material is formed by reacting the first layer of polysilicon with a substance to form an insulating film thereon.

15. A semiconductor device according to claim 13, wherein the disposed insulating material is formed by depositing an insulating material thereon.

16. A semiconductor device comprising:

a silicon substrate forming one of a collector and an emitter, the substrate being of a first conductivity type;

a layer of SiGe of a second conductivity type covering at least a portion of the silicon substrate;

a first layer of silicon of the second conductivity type at least substantially supported by and covering a substantial portion of the SiGe layer;

a first layer of polysilicon of the second conductivity type at least substantially supported by and covering a substantial portion of the first layer of silicon with the exception of a window region, the first layer of silicon entirely exposed within the window region and having its surface unaffected by a process of etching within the window region, the first layer of silicon forming a base terminal of the transistor; and

,

a second layer of polysilicon of the first conductivity type insulated from the first layer of polysilicon and contacting the unetched first layer of silicon within the window region in its entirety, said second layer of polysilicon forming the other of the collector and the emitter terminals of the transistor, wherein the first silicon layer has a uniform thickness profile in a direction transverse the layers within the semiconductor substrate within predetermined limits within a region of the semiconductor substrate including at least a transistor, the uniform thickness profile for providing substantially reproducible results for the thickness of the first silicon layer.

17. A semiconductor device as defined in claim 16, wherein the uniform thickness profile provides substantially reproducible electrical characteristics of the first silicon layer and the SiGe layer.

18. A semiconductor device as defined in claim 17, wherein the uniform thickness profile of the SiGe layer is other than a uniformly thick layer.