Structure of trench isolation and a method of forming the same

• US 6,756,654 B2
• Filed: 08/09/2002
• Issued: 06/29/2004
• Est. Priority Date: 08/09/2001
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Heo, Jin-Hwa, Hong, Soo-Jin
• Primary Examiner(s): Chaudhari, Chandra
• Assistant Examiner(s): Blum, David S
• Application Number:
  US10/215,342
• Publication Number:
  US 20030030121A1
• Time in Patent Office: 690 Days
• Field of Search: 438/424, 438/427, 438/435, 257/510
• US Class Current: 257/510
• CPC Class Codes: H01L 21/76229 Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Abstract

The present invention is directed toward a structure and method by which trench isolation for a wide trench and a narrow trench formed in first and second regions of a substrate may be achieved without formation of a void in an isolation layer, a groove exposing an isolation layer, or an electrical bridge between gates in a subsequent process. A lower isolation layer is formed on the substrate in a first and second trench. The lower isolation layer is patterned to fill a lower region of the first trench, and an upper isolation pattern is formed to fill the second trench and a remainder of the first trench. An aspect ratio of first trench is reduced, thereby preventing the occurrence of a void in the upper isolation layer, or a gap between the upper isolation layer and the substrate.

Claims

1. A structure of trench isolation, comprising:

a first trench and a second trench that are formed in a first region and a second region of a semiconductor substrate, respectively, the first trench having a higher aspect ratio than the second trench;

a lower isolation pattern filling a lower region of the first trench while exposing an upper sidewall of the first trench; and

an upper isolation pattern filling the second trench and an upper region of the first trench,

wherein the lower isolation pattern and the upper isolation pattern are formed of different materials.

2. The structure as claimed in claim 1, further comprising a nitride liner pattern to cover inner walls of the first and second trenches.

3. The structure as claimed in claim 2, wherein the nitride liner is silicon nitride.

4. The structure as claimed in claim 3, wherein the nitride liner is formed by low pressure chemical vapor deposition (LPCVD).

5. The structure as claimed in claim 3, wherein the nitride liner is formed to a thickness of about 30 to 140 Å

.

6. The structure as claimed in claim 1, wherein the lower isolation pattern is formed of an SOG layer.

7. The structure as claimed in claim 1, wherein the upper isolation pattern is formed of at least one of an HDP oxide layer and a USG layer.

8. The structure as claimed in claim 7, wherein when the upper isolation pattern is formed of an HDP oxide layer, an LPCVD oxide layer is formed on the substrate including the nitride liner before forming the HDP oxide layer.

9. The structure as claimed in claim 8, wherein the LPCVD oxide layer is formed to a thickness of about 100 Å

.

10. A structure of trench isolation, comprising:

a first trench and a second trench that are formed in a first region and a second region of a semiconductor substrate, respectively, the first trench having a higher aspect ratio than the second trench;

a lower isolation pattern filling lower regions of the first and second trenches, wherein an uppermost surface of the lower isolation pattern is lower than tops of the first and second trenches; and

an upper isolation pattern filling upper regions of the first and second trenches,

wherein the lower isolation pattern and the upper isolation pattern are formed of different materials.

11. The structure as claimed in claim 10, further comprising a nitride liner pattern to cover inner walls of the first and second trenches.

12. The structure as claimed in claim 10, wherein the lower isolation pattern is formed of an SOG layer.

13. The structure as claimed in claim 10, wherein the upper isolation pattern is formed of at least one of an HDP oxide layer and a USG layer.