Method to prevent die attach adhesive contamination in stacked chips

• US 6,759,307 B1
• Filed: 11/01/2000
• Issued: 07/06/2004
• Est. Priority Date: 09/21/2000
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Yang, Jicheng
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): KESHAVAN, BELUR V
• Application Number:
  US09/703,920
• Time in Patent Office: 1,343 Days
• Field of Search: 438/455, 438/106, 438/107, 438/109, 438/124, 438/127, 298/41, 257/777, 257/718, 257/723, 257/690, 361/396, 361/735
• US Class Current: 438/455
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/26145 Flow barriers
• CPC Class Codes: H01L 2224/26175 Flow barriers
• CPC Class Codes: H01L 2224/27013 for holding or confining the layer connector, e.g. solder flow barrier
• CPC Class Codes: H01L 2224/29012 in top view
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/49113 the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83051 Forming additional members, e.g. dam structures
• CPC Class Codes: H01L 2224/83139 Guiding structures on the body
• CPC Class Codes: H01L 2224/8319 Arrangement of the layer connectors prior to mounting
• CPC Class Codes: H01L 2224/838 Bonding techniques
• CPC Class Codes: H01L 2224/85399 : Material
• CPC Class Codes: H01L 2224/8592 : Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 2225/06506 : Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06562 : at least one device in the stack being rotated or offset
• CPC Class Codes: H01L 2225/06572 : Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 2225/06593 : Mounting aids permanently on device; arrangements for alignment use of temporary supports H01L21/6835
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/0781 : being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 29/49146 : with encapsulating, e.g., potting, etc.

Abstract

The present invention provides methods and apparatus related to preventing adhesive contamination of the electrical contacts of a semiconductor device in a stacked semiconductor device package. The methods and apparatus include providing a first semiconductor device with an adhesive flow control dam located on an upper surface thereof. The dam is positioned between electrical contacts and a substrate attach site on the upper surface of the first semiconductor device. The dam is rendered of a sufficient height and shape to block applied adhesive from flowing over the electrical contacts of the first semiconductor device when a second substrate is mounted onto the upper surface of the first semiconductor device. The semiconductor device package may be encapsulated with the dam in place or with the dam removed. The adhesive flow control dam thus protects the electrical contacts of the first semiconductor device from contamination by excess adhesive, which can result in unusable electrical contacts.

Claims

1. A method for preventing adhesive contamination of at least one electrical contact during manufacturing of a stacked semiconductor die package, comprising:

providing a first semiconductor die, said first semiconductor die having an upper surface, said upper surface comprising at least one electrical contact and at least one region for mounting a second semiconductor die;

providing at least one adhesive flow control dam positioned on said upper surface between said at least one region for mounting a second semiconductor die and said at least one electrical contact;

applying an adhesive to at least a portion of said at least one region for mounting a second semiconductor die; and

mounting a second semiconductor die onto said at least one region for mounting a second semiconductor die of said first semiconductor die, said adhesive prevented from contacting said at least one electrical contact by said at least one adhesive flow control dam.

2. The method of claim 1, wherein said applying an adhesive comprises applying a thermally conductive adhesive.

3. The method of claim 2, wherein said applying an adhesive comprises applying an Ag-filled polymer.

4. The method of claim 1, wherein said applying an adhesive comprises applying an electrically conductive adhesive.

5. The method of claim 4, wherein said electrically conductive adhesive comprises alumina-filled polymers.

6. The method of claim 1, wherein said applying an adhesive comprises applying an adhesive having a coefficient of thermal expansion approximating a coefficient of thermal expansion of one of a coefficient of thermal expansion of said first semiconductor die, a coefficient of thermal expansion of said second semiconductor die, and an average of the coefficients of thermal expansion of said first semiconductor die and said second semiconductor die.

7. The method of claim 1, wherein said applying an adhesive comprises applying an adhesive by one of screen printing, stenciling, stamping, rolling on, spraying on, needle dispensing, and syringe dispensing.

8. The method of claim 1, wherein said applying an adhesive comprises dispensing an adhesive of a viscosity less than about 20,000 centipoise.

9. The method of claim 1, wherein said applying an adhesive comprises stamping an adhesive of a viscosity less than about 8,000 centipoise.

10. The method of claim 1, wherein said applying an adhesive comprises screen printing an adhesive of a viscosity less than about 30,000 centipoise.

11. The method of claim 1, wherein said applying an adhesive comprises applying an adhesive of one of polyimide adhesives, polyamide adhesives, epoxy adhesives, cyanate ester adhesives, silicone adhesives and acrylic adhesives.

12. The method of claim 1, wherein said applying an adhesive comprises applying an adhesive of one of gels, pastes, and solders.

13. The method of claim 1, wherein said applying an adhesive comprises applying an adhesive to at least a portion of a mounting surface of said second semiconductor die.

14. The method of claim 1, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive flow control dam in situ on said first semiconductor die.

15. The method of claim 14, wherein said forming said at least one adhesive flow control dam in situ comprises forming at least one adhesive flow control dam by a method selected from one of sputtering, CVD, PVD, photoimaging techniques, and combinations thereof.

16. The method of claim 1, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive flow control dam by a casting technique and attaching said at least one adhesive flow control dam to said first semiconductor die.

17. The method of claim 1, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive flow control dam of a material of one of polyimides, polyamides, and epoxies.

18. The method of claim 1, wherein said providing at least one adhesive flow control dam comprises providing at least one adhesive flow control dam comprising a decoupling capacitor coupon.

19. The method of claim 1, wherein said providing a first semiconductor die comprises providing a first semiconductor die having a larger size than a size of said second semiconductor die.

20. The method of claim 1, wherein said providing a first semiconductor die comprises providing an integrated circuit semiconductor die.

21. The method of claim 1, wherein said mounting of said second semiconductor die comprises placing at least a portion of said second semiconductor die in contact with said at least one adhesive flow control dam.

22. The method of claim 21, wherein said placing at least a portion of said second semiconductor die in contact with said at least one adhesive flow control dam comprises pressing said at least a portion of said second semiconductor die against said at least one adhesive flow control dam, said at least one adhesive flow control dam being deformable.

23. A method of manufacturing a stacked semiconductor die package comprising:

providing a first semiconductor die, said first semiconductor die having an upper surface, said upper surface comprising at least one electrical contact and at least one region for mounting a second semiconductor die;

providing at least one adhesive flow control dam positioned on said upper surface between said at least one region for mounting a second semiconductor die and said at least one electrical contact;

applying an adhesive to at least a portion of said at least one region for mounting a second semiconductor die; and

mounting a second semiconductor die onto said at least one region for mounting a second semiconductor die of said first semiconductor die, said adhesive prevented from contacting said at least one electrical contact by said at least one adhesive flow control dam.

24. The method of claim 23, wherein said applying an adhesive comprises applying a thermally conductive adhesive.

25. The method of claim 24, wherein said applying a thermally conductive adhesive comprises applying an Ag-filled polymer.

26. The method of claim 23, wherein said applying an adhesive comprises applying an electrically conductive adhesive.

27. The method of claim 26, wherein said electrically conductive adhesive comprises alumina-filled polymers.

28. The method of claim 23, wherein said applying an adhesive comprises applying an adhesive having a coefficient of thermal expansion approximating a coefficient of thermal expansion of one of a coefficient of thermal expansion of said first semiconductor die, a coefficient of thermal expansion of said second semiconductor die, and an average of the coefficients of thermal expansion of said first semiconductor die and said second semiconductor die.

29. The method of claim 23, wherein said applying an adhesive comprises applying an adhesive by a method of one of screen printing, stenciling, stamping, rolling on, spraying on, needle dispensing, and syringe dispensing.

30. The method of claim 23, wherein said applying an adhesive comprises dispensing an adhesive of a viscosity less than about 20,000 centipoise.

31. The method of claim 23, wherein said applying an adhesive comprises stamping an adhesive of a viscosity less than about 8,000 centipoise.

32. The method of claim 23, wherein said applying an adhesive comprises screen printing an adhesive of a viscosity less than about 30,000 centipoise.

33. The method of claim 23, wherein said applying an adhesive comprises applying an adhesive of one of polyimide adhesives, polyamide adhesives, epoxy adhesives, cyanate ester adhesives, silicone adhesives, and acrylic adhesives.

34. The method of claim 23, wherein said applying an adhesive comprises applying an adhesive of one of gels, pastes, and solders.

35. The method of claim 23, wherein said applying an adhesive comprises applying an adhesive to at least a portion of a surface of said second semiconductor die.

36. The method of claim 23, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive flow control dam in situ on said first semiconductor die.

37. The method of claim 36, wherein said forming said at least one adhesive flow control dam in situ comprises forming at least one adhesive flow control dam by a method of one of sputtering, CVD, PVD, photoimaging techniques, and combinations thereof.

38. The method of claim 23, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive flow control dam by a casting technique and attaching said at least one adhesive flow control dam to said first semiconductor die.

39. The method of claim 23, wherein said providing at least one adhesive flow control dam comprises forming at least one adhesive control dam of a material of one of polyimides, polyamides, and epoxies.

40. The method of claim 23, wherein said providing at least one adhesive flow control dam comprises providing at least one adhesive flow control dam comprising a decoupling capacitor coupon.

41. The method of claim 23, wherein said providing a first semiconductor die comprises providing a first semiconductor die having a larger size than a size of said second semiconductor die.

42. The method of claim 23, wherein said providing a first semiconductor die comprises providing an integrated circuit semiconductor die.

43. The method of claim 23, further comprising encapsulating at least a portion of a surface area of said first semiconductor die and said second semiconductor die.

44. The method of claim 43, wherein said encapsulating at least a portion of a surface area of said first semiconductor die and said second semiconductor die further comprises encapsulating said at least one adhesive flow control dam.

45. The method of claim 44, wherein said providing said at least one adhesive flow control dam comprises forming said at least one adhesive flow control dam from a composition of materials substantially similar to materials used for said encapsulating at least a portion of a surface area of said first semiconductor die and said second semiconductor die.

46. The method of claim 43, further comprising removing said at least one adhesive flow control dam prior to said encapsulating.

47. The method of claim 23, wherein said applying an adhesive comprises applying said adhesive such that at least a portion of said adhesive is disposed adjacent said at least one adhesive flow control dam and outside said at least one region for mounting a second semiconductor die.

48. The method of claim 47, wherein said applying an adhesive comprises applying a thermally conductive adhesive.

49. The method of claim 23, wherein said mounting of said second semiconductor die comprises placing at least a portion of said second semiconductor die in contact with said at least one adhesive flow control dam.

50. The method of claim 49, wherein said placing at least a portion of said second semiconductor die in contact with said at least one adhesive flow control dam comprises pressing said at least a portion of said second semiconductor die against said at least one adhesive flow control dam, and wherein said providing said at least one adhesive flow control dam comprises providing at least one adhesive flow control dam which is deformable.

51. The method of claim 23, further comprising wire bonding said at least one electrical contact, and wherein said providing at least one adhesive flow control dam comprises configuring said at least one adhesive flow control dam for preventing solder flow onto at least a portion of said second semiconductor die or an extension thereof during said wire bonding.