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Method of avoiding dielectric arcing

  • US 6,759,342 B2
  • Filed: 10/11/2002
  • Issued: 07/06/2004
  • Est. Priority Date: 10/11/2002
  • Status: Expired due to Fees
First Claim
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1. A method for reducing electrical charge imbalances in a semiconductor process wafer comprising the steps of:

  • providing a semiconductor process wafer comprising a dielectric insulating layer;

    exposing the semiconductor process wafer to a semiconductor process whereby an electrical charge imbalance accumulates in charge imbalance portions of the dielectric insulating layer; and

    , treating the semiconductor process wafer with a controlled atmosphere of treatment gas comprising one of a continuous and periodic flow of at least one of inert gas and hydrogen to reduce an accumulated charge imbalance in the charge imbalance portions.

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