Multiplexer with channel sectioning, selectivity actuated current sources, and common-base amplifiers

• US 6,760,349 B1
• Filed: 09/05/2000
• Issued: 07/06/2004
• Est. Priority Date: 09/05/2000
• Status: Active Grant

• Current Assignee: Broadcom International Pte Ltd. (Broadcom, Inc.)
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Ho, Peter, Flower, Graham M., Walker, Richard C.
• Primary Examiner(s): Pham, Chi
• Assistant Examiner(s): Ferris, Derrick W
• Application Number:
  US09/654,635
• Time in Patent Office: 1,400 Days
• Field of Search: 370/532, 370/537, 327/407, 327/408, 327/409, 327/410, 327/411, 327/412, 327/413, 327/99
• US Class Current: 370/537
• CPC Class Codes: H03K 17/6264 using current steering means
• CPC Class Codes: H04J 3/047 Distributors with transistors or integrated circuits

Abstract

A multiplexer for use with switching apparatus for data communication networks. The multiplexer topology includes two or more groupings, or sections, each containing a plurality of individual channels. Each of the channels has an input buffer amplifier and an output Ft-doubler circuit. The outputs of all of the channels within a each particular channel section are connected in parallel relation, and fed to respective common-base transistor amplifiers. The outputs of all of the common-base amplifiers for each channel section, in turn, are connected in parallel and fed to the inputs of a pair of emitter-follower amplifiers. Through the use of selectively actuated current sources, each multiplexer channel is normally biased off, unless that channel is selected for a switching operation. Bleeder current sources are applied to the emitters of the common-base amplifiers to reduce output jitter from the channels which are biased off. The multiplexer architecture provides high speed operation from channel sectioning, and low power consumption by reducing both the amount of current drawn and the voltage potential necessary, to operate the multiplexer.

Claims

1. A multiplexer for routing electrical signals, comprising:

a. at least first and second channel sections, each of said channel sections having a plurality of channels for routing a signal from a respective channel input to a respective channel output, each of said channel outputs from said first and second channel sections being respectively connected in parallel;

b. means for selecting a particular said channel within said first or said second channel section, and routing an electrical signal delivered to its channel input to its channel output; and

,

c. at least first and second pairs of common-base amplifiers, said first pair of common-base amplifiers having emitter inputs connected to said parallel outputs of said first channel section, and said second pair of common-base amplifiers having emitter inputs connected to said parallel outputs of said second channel section, said first and second pairs of common-base amplifiers having respective collector outputs, said outputs of said first and second common-base amplifier outputs being connected in parallel to provide a multiplexer output.

2. A multiplexer as in claim 1, further including means for reducing signal jitter at said emitter inputs of said first and second pairs of common-base amplifiers.

3. A multiplexer as in claim 2 in which said means for reducing jitter comprises a bleeder current source which establishes a minimum base-emitter junction voltage for said common-base amplifiers.

4. A multiplexer as in claim 3 in which said minimum base-emitter junction voltage is selected so that a settling voltage for an electrical signal of long duration is substantially the same as that for an electrical signal of short duration.

5. A multiplexer as in claim 1 in which said outputs of said common-base amplifiers are connected to a pair of emitter-follower amplifiers.

6. A multiplexer as in claim 1 in which a predetermined ratio exists between the number of said common-base transistors and the number of channels in each said channel sections, said predetermined ratio being selected so that the ratio of said common-base amplifiers for a channel section to the number of channels within said channel section, is approximately the same as the ratio between an impedance at said emitter input of said common-base amplifiers to an impedance at said output of said common-base amplifiers.

7. A multiplexer as in claim 6 in which said ratio is selected to fall within a range of 4:

15, 5;

12, or 6;

10.

8. A multiplexer as in claim 1 in which said means for selecting a particular said channel within said first or said second channel section includes a plurality of switchable current sources within each of said channels.

9. A multiplexer as in claim 8 in which each of said switchable current sources within each of said channels is interconnected to a respective select line input, and further including a decoder having a plurality of outputs connected to each of said respective select line inputs.

10. A multiplexer as in claim 1 including four of said channel sections, and in which each of said channel sections includes seventeen of said channels.

11. A multiplexer as in claim 1 in which at least one of said channels includes an input buffer and an output Ft-doubler.

12. A multiplexer for routing electrical signals, comprising:

a plurality of channel sections, each of said channel sections having a plurality of channels for routing a signal from a respective channel input to a respective channel output, each of said channel outputs from said plurality of channel sections being respectively connected in parallel;

b. means for selecting a particular said channel within said plurality of channel sections, and routing an electrical signal delivered to its channel input to its channel output; and

,

c. a plurality of pairs of common-base amplifiers, each of said pair of common-base amplifiers having emitter inputs connected to said parallel outputs of a respective channel section, each of said pair of common-base amplifiers having respective collector outputs, said outputs of said plurality of pairs of common-base amplifiers being connected in parallel to provide a multiplexer output.

13. A multiplexer as in claim 12, further including means for reducing signal jitter at said emitter inputs of said first and second pairs of common-base amplifiers.

14. A multiplexer as in claim 12 in which said means for reducing jitter comprises a bleeder current source which establishes a minimum base-emitter junction voltage for said common-base amplifiers.

15. A multiplexer as in claim 14 in which said minimum base-emitter junction voltage is selected so that a settling voltage for an electrical signal of long duration is substantially the same as that for an electrical signal of short duration.

16. A multiplexer as in claim 12 in which said outputs of said common-base amplifiers are connected to a pair of emitter-follower amplifiers.

17. A multiplexer as in claim 12 in which a predetermined ratio exists between the number of said common-base transistors and the number of channels in each said channel sections, said predetermined ratio being selected so that the ratio of said common-base amplifiers for a channel section to the number of channels within said channel section, is approximately the same as the ratio between an impedance at said emitter input of said common-base amplifiers to an impedance at said output of said common-base amplifiers.

18. A multiplexer as in claim 17 in which said ratio is selected to fall within a range of 4:

15, 5;

12, or 6;

10.

19. A multiplexer as in claim 12 in which said means for selecting a particular said channel within said first or said second channel section includes a plurality of switchable current sources within each of said channels.

20. A multiplexer as in claim 19 in which each of said switchable current sources within each of said channels is interconnected to a respective select line input, and further including a decoder having a plurality of outputs connected to each of said respective select line inputs.

21. A multiplexer as in claim 12 including four of said channel sections, and in which each of said channel sections includes seventeen of said channels.

22. A multiplexer as in claim 12 in which at least one of said channels includes an input buffer and an output Ft-doubler.