Method and apparatus executing power on self test code to enable a wakeup device for a computer system responsive to detecting an AC power source

• US 6,760,850 B1
• Filed: 07/31/2000
• Issued: 07/06/2004
• Est. Priority Date: 07/31/2000
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Dunn, Loren S., Massey, Paul G., Atkinson, Lee W., Lakdawala, Rahul V.
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): Trujillo, James K
• Application Number:
  US09/628,739
• Time in Patent Office: 1,436 Days
• Field of Search: 713/300, 713/320, 713/323, 713/324, 713/340, 713/310, 713/330, 713/322
• US Class Current: 713/320
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3209 Monitoring remote activity, e.g. over telephone lines or network connections

Abstract

A computer system that selectively disables power to wake on LAN (WOL) devices in the absence of AC power. In one embodiment, the computer system comprises a power supply and a power management controller. The power supply is configured to provide power to a wakeup device. The power management controller receives an AC voltage sense signal that indicates the presence or absence of an AC power source and enables the power supply to provide power to the wakeup device when the AC voltage sense signal is asserted. The power management controller preferably disables the power supply when the AC voltage sense signal is de-asserted. The computer system may operate in several states including an off state, a power on self test (POST) state, a working state, a trap state, and an armed state.

Claims

1. A computer system that comprises:

a CPU;

a memory coupled to the CPU, wherein the memory stores power on self test (POST) code; and

a power management controller coupled to the CPU, wherein the power management controller is configurable to receive an AC voltage sense signal, wherein assertion of the AC voltage sense signal indicates the presence of an AC power source, and wherein, if the power management controller is so configured by a user, the power management controller causes the CPU to transition from a low power state to an operable state and to execute the POST code to enable a wakeup device, following which the computer system, with the wakeup device still enabled, is in a low power state capable of transitioning to a working state when the wakeup device detects a wakeup signal.

2. The computer system of claim 1, wherein the computer system operates in a plurality of states including an off state, a power on self test (POST) state, the working state, a trap state, and an armed state, wherein in the off state the wakeup device is unpowered and in the armed state the wakeup devices is powered.

3. The computer system of claim 2,

wherein when the AC voltage sense signal becomes asserted the computer system enters the POST state and the CPU executes basic input/output system (BIOS) code, wherein the BIOS code configures the CPU to conduct a POST sequence and to place the computer system into the armed state.

4. The computer system of claim 3, wherein in the trap state, the CPU configures the wakeup devices to enable wakeup on LAN (WOL) and places the computer system into the armed state if the AC voltage sense signal is asserted.

5. The computer system of claim 4, wherein in the trap state, the CPU configures the wakeup devices to enable wakeup on LAN (WOL) and places the computer system into the armed state if a forced-enable bit is set.

6. The computer system of claim 3, wherein in the presence of a network connection, the wakeup device is configured to monitor the network for wakeup events;

and

wherein the CPU commands the computer system to periodically transition from the off state to the POST state to execute BIOS code and power the wakeup devices.

7. The computer system of claim 6, wherein in the POST state, if the wakeup devices detects the existence of a network connection, the CPU and BIOS code place the computer into the armed state;

and

wherein if the wakeup devices detects the existence of a network wakeup event, the CPU and BIOS code place the computer into the working state; and

wherein if the wakeup devices detects neither the existence of a network connection nor a network wakeup event, the CPU and BIOS code place the computer into the off state.

8. The computer system of claim 2, wherein the computer system is configured to transition from the armed state to the off state when the AC voltage sense signal becomes de-asserted.

9. The computer system of claim 2, wherein the power supply is the primary power supply used to supply power to the computer system.

10. A method comprising:

detecting whether an AC power source is present;

asserting an AC voltage sense signal only when an AC power source is present;

disabling power to a wakeup device according to a user configuration of the wakeup device and when the AC voltage sense signal is de-asserted;

conducting a power on self test (POST) in response to the assertion of the AC voltage sense signal; and

entering an armed state in which power is supplied to the wakeup device in response to the POST.

11. The method of claim 10, further comprising:

providing power to the wakeup device if an override signal is asserted.

12. The method of claim 10, further comprising:

entering a working state in response to a wake command;

entering a trap state in response to a shutdown command, wherein if the AC voltage sense signal is asserted in the trap state the wakeup device is configured to enable wakeup on LAN (WOL) before the computer system enters the armed state, wherein if the AC voltage sense signal is de-asserted in the trap state the computer system enters an off state.

13. The method of claim 10, further comprising:

transitioning from the armed state to the off state if the AC voltage sense signal is de-asserted.

14. A computer system that comprises:

a power supply configured to power a plurality of computer components from a power source;

a wakeup device configurable to awaken the computer system;

a CPU that executes POST code to enable or disable the wakeup device according to user input and a status of an AC voltage sense signal;

a power switch coupled between the power supply and the wakeup device; and

a power management controller coupled to the power switch to selectively block power to the wakeup device when the computer system is disconnected from an external power source.

15. The computer system of claim 14, wherein the power supply is an auxiliary power supply, and wherein the computer system further comprises;

a main power supply configured to power the CPU.

16. The computer system of claim 15, further comprising:

a main power switch coupled between the power source and the main power supply.

17. The computer system of claim 16, wherein if the computer is off, the power management controller is configured to close the main power switch when the computer system becomes connected to the external power source.

18. The computer system of claim 17, wherein the CPU executes a power-on self-test (POST) sequence and enables the wakeup device when the computer system becomes connected to the external power source.

19. The computer system of claim 18, wherein after enabling the wakeup device, the CPU commands the power management controller to open the main power switch unless a power-on event is detected.