Integrated circuit inductors

• US 6,760,967 B2
• Filed: 03/19/2002
• Issued: 07/13/2004
• Est. Priority Date: 07/09/1999
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): Nguyen, Viet Q.
• Application Number:
  US10/102,071
• Publication Number:
  US 20020100161A1
• Time in Patent Office: 847 Days
• Field of Search: 296/04, 296/05, 296/06, 296/07, 296/031, 257/531, 257/528, 257/421
• US Class Current: 29/604
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 37/00 Fixed inductances not covered by group H01F17/00
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: Y10S 257/924 with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49037 Using reference point/surface to facilitate measuring
• CPC Class Codes: Y10T 29/49069 Data storage inductor or core
• CPC Class Codes: Y10T 29/49071 by winding or coiling
• CPC Class Codes: Y10T 29/49073 by assembling coil and core
• CPC Class Codes: Y10T 29/49075 including permanent magnet or core

Abstract

The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.

Claims

1. A memory system comprising:

a coated substrate having a number of memory cells; and

an inductive structure having an inductance of at least 0.5 nanohenrys piercing the coated substrate and interlaced with the coated substrate and interconnected with at least one of the number of memory cells.

2. The memory system of claim 1, wherein the coated substrate includes a magnetic film.

3. The memory system of claim 2, wherein the coated substrate includes an insulating layer atop the magnetic film.

4. The memory system of claim 1, wherein the inductive structure includes a conductive coil.

5. A memory system comprising:

a substrate;

a magnetic coating formed over a portion of the substrate;

a number of memory cells formed integral with the substrate; and

an inductive structure having an inductance of at least 0.5 nanohenrys piercing the coating so as to be interlaced with the substrate and interconnected with at least one of the number of memory cells.

6. The memory system of claim 5, wherein the magnetic coating includes nickel and iron.

7. The memory system of claim 5, wherein the inductive structure includes a coil comprising planar metal segments that traverse the coating.

8. The memory system of claim 5, further including a sense inductor formed integral with the substrate and magnetically coupled to the inductive structure.

9. A memory system comprising:

a substrate having a surface a number of memory cells;

a coating formed over a portion of the surface of the substrate;

a contiguous conductive coil having an inductance of at least 0.5 nanohenrys, the coil comprising first segments that pass through the substrate, and second segments that traverse the coating and that run parallel to the substrate surface; and

wherein the coil is operatively coupled to at least one of the number of memory cells.

10. The memory cell of claim 9, wherein the substrate comprises a semiconductor material.

11. The memory cell of claim 9, wherein the coating includes a magnetic film.

12. The memory cell of claim 11, wherein the coating includes an insulating layer.

13. The memory cell of claim 9, wherein the contiguous conductive coil is formed from two or more metals.

14. The memory cell of claim 9, wherein the contiguous conductive coil has a triangular cross-section.

15. A memory system comprising:

a semiconductor substrate having formed therein a number of memory cells;

a magnetic film formed over a portion of the substrate remote from the memory cells;

an inductive structure comprising a coil with an inductance of at least 0.5 nanohenrys, the coil surrounding the magnetic film and piercing the substrate; and

wherein the coil is connected to at least one of the number of memory cells.

16. The memory system of claim 15, wherein the semiconductor substrate is one of silicon, germanium, gallium arsenide and silicon carbide.

17. The memory system of claim 15, further including an insulating layer covering the magnetic film.

18. The memory system of claim 17, wherein the insulating layer covers a portion of the coil.

19. A memory system comprising:

a substrate;

a plurality of memory cells formed integral with the substrate;

a conductive coil having an inductance of 0.5 nanohenrys or greater, the coil connected to the memory cells and interwoven with a portion of the substrate by passing through the substrate through a plurality of subtending holes formed in the substrate; and

a coating formed on the substrate and surrounded by the coil.

20. The memory system of claim 19, wherein the coating includes a magnetic film.

21. The memory system of claim 20, wherein the coating includes an insulating layer formed atop the magnetic film.

22. The memory system of claim 21, wherein the insulating layer is a dielectric.

23. A memory system comprising:

a substrate;

a magnetic film formed over a portion of the substrate;

a number of memory cells formed integral with the substrate;

a coil connected to the memory cells, the coil being interlaced with the portion of the substrate covered by the magnetic film; and

wherein the coil has an inductance of at least 0.5 nanohenrys.

24. The memory system of claim 23, wherein the coil includes flat parallel conducting segments that traverse the magnetic film.

25. The memory system of claim 23, wherein the coil has a rectangular cross-section.

26. The memory system of claim 23, wherein the coil has a triangular cross-section.

27. A memory system comprising:

a substrate with a coating;

a number of memory cells formed in the substrate;

an inductive structure comprising a conductive coil formed from at least two conductors and having an inductance of at least 0.5 nanohenrys, the coil piercing the substrate and interlaced with a portion of the substrate and coating; and

wherein the coil is operative connected to at least one of the number of memory cells.

28. The memory system of claim 27, wherein the at least two conductors include copper and aluminum.

29. The memory system of claim 27, further including a sense coil formed on the substrate.

30. The memory system of claim 27, further including a sense coil formed in the substrate.

31. The memory system of claim 27, wherein the conductive coil comprises interconnecting first and second segments, wherein the first segments pass through the substrate and are formed from a first conductor and the second segments run parallel to opposing surfaces of the substrate and are formed from a second conductor.

32. The memory system of claim 27, wherein the coating comprises a magnetic material.

33. The memory system of claim 32, wherein the coating comprises an insulating material.