Active matrix type liquid crystal display device and method of fabricating the same

• US 6,762,805 B2
• Filed: 06/07/2002
• Issued: 07/13/2004
• Est. Priority Date: 06/08/2001
• Status: Expired due to Term

• Current Assignee: NLT Technologies, Ltd.
• Original Assignee: NEC LCD Technologies Limited (NEC Corporation)
• Inventors: Ishino, Takayuki
• Primary Examiner(s): Parker, Kenneth
• Application Number:
  US10/163,612
• Publication Number:
  US 20020196382A1
• Time in Patent Office: 767 Days
• Field of Search: 349/43, 349/44, 349/46, 349/111, 349/143
• US Class Current: 349/46
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio

Abstract

An active matrix type liquid crystal display device includes (a) a transparent substrate, (b) a plurality of scanning lines formed on the transparent substrate, (c) a plurality of signal lines formed on the transparent substrate perpendicularly to the scanning lines, (d) a transparent electrode arranged in a pixel area defined by the scanning and signal lines, and (e) a thin film transistor formed in association with the transparent electrode, the thin film transistor being formed in an area at which one of the scanning lines and one of the signal lines intersect with each other, the thin film transistor including source and drain regions both comprised of an electrically conductive film of which the signal lines are comprised.

Claims

1. An active matrix type liquid crystal display device comprising:

(a) a transparent substrate;

(b) a plurality of scanning lines formed on said transparent substrate;

(c) a plurality of signal lines formed on said transparent substrate perpendicularly to the scanning lines;

(d) a transparent electrode arranged in a pixel area defined by said scanning and signal lines; and

(e) a thin film transistor formed in association with said transparent electrode,

wherein said thin film transistor is formed in an area at which one of said scanning lines and one of said signal lines intersect with each other,

wherein said thin film transistor includes source and drain regions both comprised of an electrically conductive film of which said signal lines are comprised, and

wherein each of said scanning lines has a portion having a decreased width in said area at which one of said scanning lines and one of said signal lines intersect with each other, said portion acting as a gate electrode of said thin film transistor.

2. The active matrix type liquid crystal display device as set forth in claim 1, wherein said thin film transistor is comprised of:

(e1) an island including a gate insulating film and a semiconductor layer both formed on each of said scanning lines in said area at which one of said scanning lines and one of said signal lines intersect with each other;

(e2) a drain electrode comprised of a part of each of said signal lines which part extends across said island; and

(e3) a source electrode comprised of an electrically conductive film of which each of said signal lines is comprised, and formed on said island with being spaced away from said drain electrode.

3. The active matrix type liquid crystal display device as set forth in claim 1, further comprising a light-shielding layer surrounding said transparent electrode and being connected to said source electrode, said light-shielding layer being formed with a contact hole through which said source electrode is electrically connected to said transparent electrode.

4. The active matrix type liquid crystal display device as set forth in claim 3, wherein said light-shielding layer has a portion having an increased width, said contact hole being formed at said portion.

5. The active matrix type liquid crystal display device as set forth in claim 3, wherein said light-shielding layer has a uniform width.

6. The active matrix type liquid crystal display device as set forth in claim 5, wherein said contact hole is located within said light-shielding layer of uniform width.

7. The active matrix type liquid crystal display device as set forth in claim 6, wherein said contact hole has a rectangular cross-section having a longer side extending in a length-wise direction of said light shielding layer.

8. The active matrix type liquid crystal display device as set forth in claim 1, further comprising an island formed on each of said scanning lines at said portion having a decreased width, said island including a gate insulating film and a semiconductor layer both of which is greater in width than said portion.

9. The active matrix type liquid crystal display device as set forth in claim 8, further comprising a first ohmic layer and a second ohmic layer both formed on said semiconductor layer such that said first and second ohmic layers are spaced away from each other, said first ohmic layer being formed as an extension of each of said signal lines and acting as a drain electrode of said thin film transistor, said second ohmic layer acting as a source electrode of said thin film transistor.

10. The active matrix type liquid crystal display device as set forth in claim 1, wherein each of said signal lines has a portion having a decreased width in said area at which one of said scanning lines and one of said signal lines intersect with each other, said portion acting as a drain electrode of said thin film transistor.

11. A method of fabricating an active matrix type liquid crystal display device, comprising the steps of:

(a) forming a plurality of scanning lines on a transparent substrate;

(b) forming an island in an area at which one of said scanning lines and one of later mentioned signal lines intersect with each other, said island including a gate insulating film, a semiconductor layer and an ohmic layer all formed on each of said scanning lines in this order;

(c) forming a plurality of signal lines extending perpendicularly to said scanning lines, each of said signal lines including a portion located on said island and acting as a drain electrode;

(d) forming a source electrode on said island such that said source electrode faces and is spaced away from said drain electrode;

(e) forming an interlayer insulating film entirely over a resultant resulted from said step (d);

(f) forming a contact hole so that said source electrode partially appears;

(g) forming a transparent electrode in a pixel area defined by said scanning and signal lines; and

(h) electrically connecting said transparent electrode to said source electrode through said contact hole,

wherein each of said scanning lines is formed to have a portion having a decreased width in said area at which one of said scanning lines and one of said signal lines intersect with each other, said portion acting as a gate electrode.

12. The method as set forth in claim 11, wherein said steps (c) and (d) are concurrently carried out.

13. The method as set forth in claim 11, wherein each of said signal lines and said source electrode are concurrently formed in a common photolithography step.

14. The method as set forth in claim 11, further comprising the step at forming a light-shielding layer which surrounds said transparent electrode and is connected to said source electrode, said light-shielding layer being formed with said contact hole.

15. The method as set forth in claim 14, wherein said light-shielding layer is formed to have a portion having an increased width, said contact hole being formed at said portion.

16. The method as set forth in claim 14, wherein said light-shielding layer is formed to have a uniform width, and said contact hole is located within said light-shielding layer of uniform width.

17. The method as set forth in claim 16, wherein said contact hole is formed to have a rectangular cross-section having a longer side extending in a length-wise direction of said light-shielding layer.

18. The method as set forth in claim 11, wherein said island is formed on each of said scanning lines at said portion having a decreased width, said gate insulating film and said semiconductor layer both being greater in width than said portion.

19. The method as set forth in claim 18, further comprising the step of forming a first ohmic layer and a second ohmic layer both on said semiconductor layer such that said first and second ohmic layers are spaced away from each other, said first ohmic layer being formed as an extension of each of said signal lines and acting as said drain electrode, said second ohmic layer acting as said source electrode.

20. The method as set forth in claim 11, wherein each of said signal lines is formed to have a portion having a decreased width in said area at which one of said scanning lines and one of said signal lines intersect with each other, said portion acting as said drain electrode.