Methods of driving an array of optical elements

• US 6,762,873 B1
• Filed: 01/23/2002
• Issued: 07/13/2004
• Est. Priority Date: 12/19/1998
• Status: Expired due to Term

• Current Assignee: Qinetiq Limited (QinetiQ Group PLC)
• Original Assignee: Qinetiq Limited (QinetiQ Group PLC)
• Inventors: Coker, Timothy M, Crossland, William A
• Primary Examiner(s): Schwartz, Jordan M.
• Assistant Examiner(s): STULTZ, JESSICA T
• Application Number:
  US09/868,217
• Time in Patent Office: 902 Days
• Field of Search: 359/224, 359/230, 359/290, 359/291, 359/298, 427/162, 427/534, 345/96, 345/33, 345/209, 345/90, 345/92, 345/97
• US Class Current: 359/290
• CPC Class Codes: G09G 2310/0245 Clearing or presetting the whole screen independently of waveforms, e.g. on power-on G09G2310/063 takes precedence
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2320/0606 Manual adjustment
• CPC Class Codes: G09G 2320/0626 for control of overall brightness
• CPC Class Codes: G09G 3/2018 by time modulation using two or more time intervals
• CPC Class Codes: G09G 3/3651 using multistable liquid crystals, e.g. ferroelectric liquid crystals
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes

Abstract

Relates to writing an array of optical elements which are each switched between two states according to input data sets. In a first method, data is written in two steps in which different selected elements are respectively driven to one binary state and the other binary state. The selected elements of the two sets may be complementary, but are preferably only those which are required to change from their existing state. The latter criterion may be used in an alternative method using a single addressing of the array to turn elements in either direction as required. In a further method, as shown, selected elements only of a blank array are written in a first WRITE step so as to correspond with a set of data, and in a subsequent second ERASE step the selected elements are selectively erased to restore a blank array prior to writing and erasing another set of data. The methods have particular utility for maintaining a dc balance at pixels of a liquid crystal array.

Claims

1. A method of controlling an array of optical elements in a succession of cycles to alter their states according to respective ones of a series of input data sets, each cycle comprising a first step wherein selected elements only of an optically blank or uniform array are written as determined by a respective data set, and a second step wherein the selected elements are selectively erased to restore a blank array prior to another cycle.

2. A method according to claim 1 wherein the array of optical elements to which the method is applied comprises a corresponding array of addressable active elements, and an electrode spaced from said corresponding array, each optical element being defined between said spaced electrode and a corresponding active element, and wherein during the said first step the active elements of a first set and the spaced electrode are operated to apply a first potential difference across the selected optical elements of the first set, and during the said second step the active elements of a second set and the spaced electrode are operated to apply a second potential difference across the selected optical elements of the second set, the first and second potential difference having opposite signs.

3. A method according to claim 2 wherein said first and second potential differences have equal amplitudes.

4. A method according to claim 2 wherein between the first and second said steps voltages on the spaced electrode and on each element of the array are all shifted substantially simultaneously by the same amount and in the same direction relative to a reference voltage.

5. A method according to claim 1 wherein the array of optical elements to which the method is applied comprises a corresponding array of addressable active elements, and an electrode spaced from said corresponding array, each optical element being defined between said spaced electrode and a corresponding active element, and wherein between the first and second said steps voltages on the spaced electrode and on each element of the array are all shifted substantially simultaneously by the same amount and in the same direction relative to a reference voltage.

6. A method according to claim 4 or claim 5 wherein said shift in voltage is applied to said spaced electrode only for substantially the duration of said second step.

7. A method according to claim 1, wherein between said first step and said second step is a step of simultaneously addressing all the optical elements of the array so as to impose zero potential difference thereacross.

8. A method according to claim 1, wherein between said first step and said second step is a step is simultaneously addressing all the optical elements of the array so as to impose a finite dc potential difference thereacross.

9. A method according to claim 7 wherein the optical elements are capacitative and subsequent to said simultaneous addressing all the optical elements are rendered open circuit.

10. A method according to claim 1, wherein between said first step and said second step in a step of simultaneously addressing all the optical elements of the array so as to impose a finite ac potential difference thereacross.

11. A method of synthesising a multi-level image using a multiple or weighted bit plane techniques in which each bit plane is written by a method as defined in claim 1.

12. A method according to claim 11, wherein the said method for writing each bit plane provides dc balancing.

13. An electro-optic arrangement comprising:

an array of electro-optic elements; and

control means responsive to a series of input data sets, the control means being arranged to respond to each data set so that starting with an optically blank or uniform array of elements in a first step, the selected elements are written as determined by the data set, and in a second step, the selected elements are selectively erased to revert to a blank array prior to writing elements as determined by a successive data set.

14. An arrangement according to claim 13 wherein said array of electro-optic elements is defined by corresponding pixel electrodes of an active backplane.

15. An arrangement according to claim 14 wherein said active backplane is a semiconductor backplane.

16. An arrangement according to any one of claims 13 to 15 wherein said electro-optic elements comprise liquid crystal material located between said pixel electrodes and a spaced electrode.

17. An arrangement according to claim 16 wherein said spaced electrode is a single electrode common to all said electro-optic elements.

18. An arrangement according to claim 13, wherein the electro-optic elements are bistable.

19. An arrangement according to claim 13, wherein the electro-optic elements are monostable with a finite relaxation time.

20. An arrangement according to claim 13, wherein said array comprises a plurality of mutually exclusive sets of said elements, means arranged to address said sets one at a time, and means for addressing more than one of said plurality of sets simultaneously.