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Position independent testing of circuits

  • US 6,763,485 B2
  • Filed: 04/02/2002
  • Issued: 07/13/2004
  • Est. Priority Date: 02/25/1998
  • Status: Expired due to Term
First Claim
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1. A process of testing an integrated circuit comprising:

  • A. configuring a functional circuit into a test mode;

    B. capturing one response data bit output from each of plural scan paths, associated with the functional circuit, into a scan collector;

    C. simultaneously loading stimulus data bits into a scan distributor and unloading response data bits from the scan collector;

    D. shifting the scan paths one bit to load each scan path with one stimulus data bit from the scan distributor;

    E. if the scan paths are not filled with stimulus data bits, then repeating steps B, C, and D;

    F. if the scan paths are full of stimulus data bits, then applying the stimulus data bits in the scan paths to the functional circuit, capturing response data bits from the functional circuit in the scan paths, and returning to step B.

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