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Device structure and method for reducing silicide encroachment

  • US 6,765,273 B1
  • Filed: 07/14/1998
  • Issued: 07/20/2004
  • Est. Priority Date: 06/30/1997
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device comprising:

  • an isolation region formed in a substrate, said isolation region having a top surface extending less than 1500 Å

    above a substrate surface;

    a silicon gate electrode formed on a gate dielectric formed on said substrate surface, said silicon gate electrode having a first thickness;

    a gate silicide layer formed on said silicon gate electrode, said gate silicide layer having a second thickness, said second thickness greater than said first thickness;

    a pair of sidewall spacers on opposite sides of said gate electrode, said sidewall spacers having a height of at least 200Å

    above the second thickness of the gate silicide layer, and said sidewall spacers each having a width less than 300Å

    ;

    a pair of source/drain regions formed on opposite sides of said silicon gate electrode; and

    a source/drain silicide layer formed on said source/drain regions, said source/drain silicide layer having said second thickness and wherein the top surface of said source/drain silicide layer has a height less than the top surface of said isolation region.

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