IC package with dual heat spreaders

• US 6,765,291 B2
• Filed: 08/14/2002
• Issued: 07/20/2004
• Est. Priority Date: 09/01/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Corisis, David J.
• Primary Examiner(s): Zarneke, David A.
• Application Number:
  US10/219,118
• Publication Number:
  US 20020185727A1
• Time in Patent Office: 706 Days
• Field of Search: 257/712, 257/713, 257/276, 257/719, 257/723, 257/675, 257/686, 257/730, 257/685, 257/687, 257/659, 257/660, 257/704-708, 257/729, 257/787, 257/796, 298/30, 298/56, 361/709, 361/716, 361/711
• US Class Current: 257/713
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48095 Kinked
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49568 specifically adapted to facilitate heat dissipation
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10T 29/49121 : Beam lead frame or beam lead device
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49146 : with encapsulating, e.g., potting, etc.
• CPC Class Codes: Y10T 29/49147 : Assembling terminal to base
• CPC Class Codes: Y10T 29/49169 : Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49171 : with encapsulating
• CPC Class Codes: Y10T 29/49172 : by molding of insulating material
• CPC Class Codes: Y10T 29/49174 : Assembling terminal to elongated conductor

Abstract

A method of making an integrated circuit device using an encapsulated semiconductor die having leads extending therefrom and attaching a heat spreader to each of the major outer encapsulant surfaces thereof. One or both of the heat spreaders has a pair of end posts configured for allowing further encapsulation of portions thereof and insertion into through-holes in a substrate to position and support the device during and following the outer lead solder reflow step at board assembly. The heat spreaders provide high heat dissipation and EMR shielding, and may be connected to the substrate ground to become ground planes.

Claims

1. A semiconductor device package, comprising:

a semiconductor die having electrical leads connected thereto, the semiconductor die encapsulated in a material forming a package, the package having opposing major external surfaces and having a package edge connecting the opposing major external surfaces and a portion of the electrical leads connected to the semiconductor die extending from the package edge, lead ends of the portion of the electrical leads for connection to a substrate, the package configured with register apparatus comprising a recess in at least one peripheral edge of the package, the recess extending to each of the opposing major external surfaces, the electrical leads for vertical mounting of the semiconductor die on the substrate; and

two heat spreaders, each of the two heat spreaders contacting at least a portion of the substrate, the two heat spreaders having a portion thereof attached to a portion of one of the opposing major external surfaces of the semiconductor die, thereby containing the semiconductor die between a portion of the two heat spreaders, the two heat spreaders configured to provide essentially a sole structural support for at least one of the electrical leads, the two heat spreaders positioned so as to provide an opening between distal end portions thereof, the two heat spreaders each comprising register apparatus on at least one peripheral edge thereof for alignment with the register apparatus of the package.

2. The semiconductor device package of claim 1, wherein at least one of the two heat spreaders has at least one through-hole post extending outwardly beyond the lead ends for connection to the substrate.

3. The semiconductor device package of claim 2, wherein one of the two heat spreaders has a through-hole post proximate each end of the semiconductor die for connection to the substrate, the substrate having apertures therein.

4. The semiconductor device package of claim 2, wherein a first heat spreader of the two heat spreaders has the at least one post proximate a first end of the semiconductor die, and a second heat spreader of the two heat speaders has the at least one post proximate a second, opposite end of the semiconductor die.

5. The semiconductor device package of claim 1, wherein each of the two heat spreaders substantially covers the attached portion of the one of the opposing major external surfaces of the semiconductor die.

6. The semiconductor device package of claim 1, wherein at least one of the two heat spreaders includes use for connecting to a ground conductor on the substrate.

7. The semiconductor device package of claim 1, wherein the package comprises a vertical mount plastic-encapsulated package.

8. The semiconductor device package of claim 1, wherein the register apparatus on the at least one peripheral edge of each of the two heat spreaders includes use for machine positioning and attachment of each heat spreader on one of the opposing major external surfaces of the package.

9. The semiconductor device package of claim 8, wherein the register apparatus on the at least one peripheral edge of each of the two heat spreaders comprises cutout portions of each of the two heat spreaders.

10. The semiconductor device package of claim 1, wherein the two heat spreaders are attached to the package with an adhesive.

11. The semiconductor device package of claim 1, wherein the two heat spreaders are attached to the package with an adhesive-coated tape.

12. The semiconductor device package of claim 1, wherein the two heat spreaders comprise plates, the plates including metal, ceramic material, and plastic material.

13. The semiconductor device package of claim 1, further comprising:

a layer of material for encapsulating the two heat spreaders within the package.

14. A semiconductor device, comprising:

a semiconductor die encapsulated in material forming a package having two opposing major external surfaces and having a package edge connecting the two opposing major external surfaces and electrical leads extending therefrom, lead ends of the electrical leads for attachment to a substrate, the electrical leads for vertical mounting of the semiconductor die on the substrate, the package having register apparatus comprising a recess in at least one peripheral edge of the package, the recess extending to each of the two opposing major external surfaces; and

two heat spreaders, each heat spreader having a surface attached to one of the two opposing major external surfaces of the package, the each heat spreader contacting at least a portion of the substrate, the package sandwiched between the two heat spreaders, the two heat spreaders configured to provide essentially the sole structural support for at least one of the electrical leads, the two heat spreaders positioned so as to provide an opening between end portions thereof, the two heat spreaders each comprising register apparatus on at least one peripheral edge thereof for alignment with the register apparatus of the package.

15. The semiconductor device of claim 14, wherein at least one of the two heat spreaders has at least one post extending beyond the lead ends for attachment to the substrate.

16. The semiconductor device of claim 15, wherein one of the two heat spreaders has a post proximate each end of the semiconductor die.

17. The semiconductor device of claim 15, wherein a first heat spreader of the two heat spreaders has the at least one post proximate a first end of the semiconductor die, and a second heat spreader of the two heat spreaders has the at least one post proximate a second, opposite end of the semiconductor die.

18. The semiconductor device of claim 14, wherein each of the two heat spreaders substantially covers one of the attached two opposing major external surfaces of the package.

19. The semiconductor device of claim 14, wherein at least one of the two heat spreaders is configured for attachment to a conductor on the substrate.

20. The semiconductor device of claim 14, wherein the package comprises a vertical mount plastic-encapsulated package.

21. The semiconductor device of claim 14, wherein the register apparatus on the at least one peripheral edge of each of the two heat spreaders is configured for machine positioning and attachment of each heat spreader on one of the two opposing major external surfaces.

22. The semiconductor device of claim 21, wherein the register apparatus comprises cutout portions of each of the heat spreaders.

23. The semiconductor device of claim 14, wherein the two heat spreaders are attached to the package with an adhesive.

24. The semiconductor device of claim 14, wherein the two heat spreaders are attached to the package with an adhesive-coated tape.

25. The semiconductor device of claim 14, wherein the two heat spreaders comprise plates, the plates including metal, ceramic material, and plastic material.

26. The semiconductor device of claim 14, further comprising:

a layer of material for encapsulating the two heat spreaders within the package.

27. A vertical mount semiconductor package, comprising:

a semiconductor die having opposed major surfaces and circuits formed on one of the opposed major surfaces;

a die support member attached to another of the opposed major surfaces of the semiconductor die;

conductive outer leads along one edge of the semiconductor die between the opposed major surfaces for attachment to a substrate;

conductive lead members connecting the circuits to the conductive outer leads;

a material encapsulating portions of the semiconductor die, the die support member, and the conductive lead members, the material forming a package, the package having register apparatus comprising a recess in at least one peripheral edge of the package, the recess extending to each of the opposed major surfaces; and

thermally conductive plates comprising heat spreaders attached to the material being secured thereto, each of the heat spreaders contacting at least a portion of the substrate, each of the heat spreaders covering a portion of the material encapsulating the portions of the semiconductor die and configured to provide essentially a sole structural support for at least one of the conductive outer leads, the heat spreaders positioned so as to provide an opening between distal end portions thereof, the heat spreaders comprising register apparatus on at least one peripheral edge of each of the heat spreaders for alignment with the register apparatus of the package and for machine positioning and attachment of the heat spreaders on the opposed major surfaces of the package.

28. The vertical mount semiconductor package of claim 27, wherein the heat spreaders are secured to the material encapsulating the portions of the semiconductor die.

29. The vertical mount semiconductor package of claim 27, wherein the heat spreaders are adhesively secured to the material encapsulating the portions of the semiconductor die.

30. The vertical mount semiconductor package of claim 27, wherein the heat spreaders are secured to the material encapsulating the portions of the semiconductor die by an adhesive-coated tape.

31. The vertical mount semiconductor package of claim 27, further comprising:

a layer of material for covering a portion of the heat spreaders.

32. A vertical mount semiconductor package, comprising:

a semiconductor die having opposed major surfaces and circuits formed on one of the opposed major surfaces;

a die support member attached to another of the opposed major surfaces of the semiconductor die;

conductive outer leads along one edge of the semiconductor die between the opposed major surfaces for attachment to a substrate;

conductive lead members connecting the circuits to the conductive outer leads;

material encapsulating the semiconductor die, the die support member and the conductive lead members, the material forming a package, the package having a recess in at least one peripheral edge of the package for a register, the recess extending to each of the opposed major surfaces; and

thermally conductive plates comprising heat spreaders attached and secured to portion of the material encapsulating the semiconductor die and substantially covering the opposed major surfaces of the semiconductor die, the heat spreaders configured to provide essentially a sole structural support for at least one of the conductive outer leads, the heat spreaders positioned so as to provide an opening between distal end portions thereof, the heat spreaders comprising register apparatus on at least one peripheral edge of each of the heat spreaders for alignment with the register apparatus of the package.

33. The vertical mount semiconductor package of claim 32, wherein the heat spreaders are secured to the material encapsulating the semiconductor die.

34. The vertical mount semiconductor package of claim 32, wherein the heat spreaders are secured to the material encapsulating the semiconductor die by an adhesive material.

35. The vertical mount semiconductor package of claim 32, wherein the heat spreaders are secured to the material encapsulating the semiconductor die by an adhesive-coated tape.

36. The vertical mount semiconductor package of claim 32, further comprising:

a layer of material securing the heat spreaders to the material encapsulating the semiconductor die.

37. A heat spreader apparatus for an encapsulated semiconductor device having a row of exterior leads, a peripheral edge and at least two opposed major surfaces, the encapsulated semiconductor device having a register apparatus in the peripheral edge thereof, comprising:

a plate forming a first heat spreader for covering a portion of one of the at least two opposed major surfaces of the encapsulated semiconductor device, the first heat spreader having a lead edge proximate to the row of exterior leads having at least one post projecting therefrom for securing the encapsulated semiconductor device to a substrate having at least one circuit thereon, the first heat spreader comprising register apparatus on at least one peripheral edge thereof for accurate mounting to one of the at least two opposed major surfaces; and

another plate forming a second heat spreader for covering a portion of a second one of the at least two opposed major surfaces of the encapsulated semiconductor device, the second heat spreader having a lead edge proximate to the row of exterior leads having at least one post projecting therefrom for securing the encapsulated semiconductor device to the substrate having the at least one circuit thereon, the second heat spreader comprising register apparatus on at least one peripheral edge thereof for accurate mounting to the portion of second one of the at least two opposed major surfaces, each of the register apparatus of the first heat spreader and the second heat spreader aligned with the register apparatus of the encapsulated semiconductor device to form a recess extending into the at least two opposed major surfaces and each of the first heat spreader and the second heat spreader, the first heat spreader and the second heat spreader for providing essentially a sole structural support for at least one of the row of exterior leads, the first heat spreader and the second heat spreader are positioned so as to provide an opening between distal end portions of the first heat spreader and the second heat spreader and the at least one post aligning the row of exterior leads with the at least one circuit on the substrate.

38. The heat spreader apparatus of claim 37, wherein the first heat spreader and the second heat spreader are identical in shape for inverse attachment to the at least two opposed major surfaces.

39. The heat spreader apparatus of claim 38, wherein the at least one post is positioned adjacent one end on each of the first heat spreader and the second heat spreader.

40. The heat spreader apparatus of claim 38, wherein the first heat spreader has two posts projecting therefrom and the second heat spreader has no through-hole posts.

41. The heat spreader apparatus of claim 37, wherein the plates are comprised of metal, a metal filled polymer material, and a ceramic material.

42. The heat spreader apparatus of claim 37, wherein the register apparatus on the at least one peripheral edge of each of the first heat spreader and the second heat spreader is configured for machine positioning and attachment to one of the at least two opposed major surfaces.

43. A heat spreader apparatus for an encapsulated semiconductor device having a row of exterior leads, a peripheral edge and two opposed major surfaces, the encapsulated semiconductor device having a register apparatus in the peripheral edge thereof, comprising:

a plate of heat conductive material cut to form two heat spreaders for substantially covering each of the two opposed major surfaces of the encapsulated semiconductor device, each of the two heat spreaders having a lead edge proximate to the row of exterior leads, the two heat spreaders having at least two posts projecting therefrom for attachment to a substrate and aligning the row of exterior leads with respect to the substrate, the two heat spreaders configured to provide essentially the sole structural support for at least one of the row of exterior leads, the two heat spreaders comprising register apparatus on at least one peripheral edge thereof for accurate mounting to the two opposed major surfaces, each of the register apparatus of the two heat spreaders aligned with the register apparatus of the encapsulated semiconductor device to form a recess extending into the two opposed major surfaces and each of the two heat spreaders, the two heat spreaders positioned for providing an opening therebetween.

44. The heat spreader apparatus of claim 43, wherein each of the two heat spreaders has two posts projecting therefrom.

45. The heat spreader apparatus of claim 43, wherein each of the two heat spreaders has one post projecting therefrom.

46. The heat spreader apparatus of claim 44, wherein each of the two heat spreaders is similar in shape for inverse attachment to one of the two opposed major surfaces.

47. The heat spreader apparatus of claim 43, wherein one of the at least two posts is positioned adjacent an end of the two heat spreaders.

48. The heat spreader apparatus of claim 43, wherein one of the two heat spreaders has two posts projecting therefrom and the other of the two heat spreaders has no through-hole posts.

49. The heat spreader apparatus of claim 43, wherein the plate comprises one of metal, metal filled polymer material, and ceramic material.

50. The heat spreader apparatus of claim 43, wherein the register apparatus formed on each of the two heat spreaders is configured for machine positioning and attachment of the two heat spreaders to the two opposed major surfaces.

51. A semiconductor device package, comprising:

a semiconductor die having electrical leads connected thereto, the semiconductor die encapsulated in a material forming a package, the package having opposing major external surfaces and having four minor edge surfaces connecting the opposing major external surfaces, the package configured with register apparatus comprising a recess in at least one peripheral edge of the package, the recess extending to each of the opposing major external surfaces;

a portion of the electrical leads connected to the semiconductor die extending from one of the four minor edge surfaces, lead ends of the portion of the electrical leads being configured for connection to a substrate, the electrical leads for vertical mounting of the semiconductor die on the substrate, and at least one of the two heat spreaders having at least one through-hole post extending outwardly beyond the lead ends for connection to the substrate, the four minor edge surfaces having no heat dissipating structures;

two heat spreaders, each heat spreader having a portion thereof attached to a portion of one of the opposing major external surfaces of the semiconductor die, thereby containing the semiconductor die between a portion of the two heat spreaders, the two heat spreaders configured to provide essentially a sole structural support for at least one of the electrical leads, the two heat spreaders positioned so as to provide an opening between distal end portions of the two heat spreaders, the two heat spreaders comprising register apparatus on at least one peripheral edge of each of the heat spreaders for alignment with the register apparatus of the package.

52. The semiconductor device package of claim 51, wherein one of the two heat spreaders has a through-hole post proximate each end of the semiconductor die for connection to the substrate, the substrate having apertures therein.

53. The semiconductor device package of claim 51, wherein a first heat spreader of the two heat spreaders has at least one post proximate a first end of the semiconductor die, and a second heat spreader of the two heat spreaders has at least one post proximate a second, opposite end of the semiconductor die.

54. The semiconductor device package of claim 53, wherein each of the two heat spreaders substantially covers the attached portion of one of the opposing major external surfaces of the semiconductor die.

55. The semiconductor device package of claim 54, wherein at least one of the two heat spreaders is configured for connection to a ground conductor on the substrate.

56. The semiconductor device package of claim 55, wherein the semiconductor die comprises a vertical mount plastic-encapsulated package.

57. The semiconductor device package of claim 56, wherein the register apparatus on the at least one peripheral edge of each of the two heat spreaders is configured for machine positioning and attachment of each heat spreader on one of the opposing major external surfaces of the package.

58. The semiconductor device package of claim 57, wherein the register apparatus on the at least one peripheral edge of each of the two heat spreaders comprises cutout portions of each of the two heat spreaders.

59. The semiconductor device package of claim 51, wherein the two heat spreaders are attached to the package with an adhesive.

60. The semiconductor device package of claim 51, wherein the two heat spreaders are attached to the package with an adhesive-coated tape.

61. The semiconductor device package of claim 51, wherein the two heat spreaders comprise plates, the plates including metal, ceramic material, and plastic material.

62. The semiconductor device package of claim 51, further comprising:

a layer of material encapsulating the two heat spreaders within the package.