Enhanced memory module architecture

• US 6,765,812 B2
• Filed: 01/17/2002
• Issued: 07/20/2004
• Est. Priority Date: 01/17/2001
• Status: Active Grant

• Current Assignee: III Holdings 12, LLC (Intellectual Ventures LLC)
• Original Assignee: Honeywell International Inc.
• Inventors: Anderson, David R.
• Primary Examiner(s): Le, Vu A.
• Assistant Examiner(s): NGUYEN, NAM THANH
• Application Number:
  US10/053,031
• Publication Number:
  US 20020133684A1
• Time in Patent Office: 915 Days
• Field of Search: 365/51, 365/52, 365/230.03, 365/200, 365/63, 439/637, 361/760, 361/736
• US Class Current: 365/51
• CPC Class Codes: G11C 5/04 Supports for storage elements , e.g. memory modules; Mounting or fixing of storage elements on such supports

Abstract

A memory module architecture that supports Flash and static memory devices in addition to dynamic memory devices. The module architecture of the present invention preferably redefines standard application of chip select signals on existing module architectures to provide requisite signaling to support Flash and static RAM devices. Use of serial presence detect signaling features of standard memory modules is also modified to provide desired identity and parameters of such an enhanced module. Extending the range of supported memory devices in an otherwise standard memory module reduces the need for special designs to accommodate different and evolving types of memory and is therefore particularly applicable to embedded systems where a variety of memory types are often utilized. A further aspect of the present invention provides for a support structure to immobilize the loose edge of the memory module opposite the electrical edge connector of the module to further enhance the module'"'"'s resistance to vibration and mechanical shock by immobilizing the module with respect to rotation about the key in the socket connector.

Claims

1. A memory module comprising:

a printed circuit assembly having connector pads at one edge of said assembly; and

a plurality of memory sockets mounted on said assembly and electrically coupled to said connector pads wherein said printed circuit assembly is adapted to support both synchronous and asynchronous types of said memory devices in the memory sockets.

2. The memory module of claim 1 wherein each of said plurality of memory devices is a synchronous dynamic random access memory device.

3. The memory module of claim 1 wherein each of said plurality of memory devices is a synchronous Flash memory device.

4. The memory module of claim 1 wherein each of said plurality of memory devices is an asynchronous Flash memory device.

5. The memory module of claim 1 wherein each of said plurality of memory devices is an asynchronous static random access memory device.

6. The memory module of claim 1 wherein each of said plurality of memory devices is an asynchronous fast static random access memory device.

7. The memory module of claim 1 wherein each of said plurality of memory devices is an asynchronous low power static random access memory device.

8. The memory module of claim 1 wherein said connector pads include:

a first select signal connector pad that selects a first subset of memory devices mounted on said module when a signal is applied thereto wherein said first subset of memory devices are synchronous memory devices; and

a second select signal connector pad that selects a second subset of memory devices mounted on said module when a signal is applied thereto wherein said second subset of memory devices are asynchronous memory devices.

9. The memory module of claim 1 wherein said connector pads include:

a first select signal connector pad that selects a first subset of memory devices mounted on said module when a signal is applied thereto wherein said first subset of memory devices are synchronous dynamic random access memory devices; and

a second select signal connector pad that selects a second subset of memory devices mounted on said module when a signal is applied thereto wherein said second subset of memory devices are synchronous Flash memory devices.

10. A system comprising:

a system board;

a memory bus adapted for exchanging signals between a memory controller and both synchronous and asynchronous memory devices;

a memory controller on said system board coupled to said memory bus wherein said memory controller is capable of generating signals for control of both synchronous and asynchronous memory devices and wherein said memory controller is capable of multiplexing said signals on said memory bus;

a first socket connector on said system board for receiving a first memory module wherein said first socket connector is coupled to said memory controller through said memory bus; and

a first memory module inserted in said first socket connector and electrically coupled to said memory controller wherein said first memory module includes a plurality of synchronous or asynchronous memory devices.

11. The system of claim 10 further comprising:

a jumper on said system board for configuring signals exchanged between said memory controller and said first memory module in accordance with the type of memory devices on said first memory module.

12. The system of claim 10 wherein said first memory module provides serial presence detect information used in conjunction with said memory controller to identify the type of memory devices included on said first memory module.

13. The system of claim 10 wherein said first memory module includes a plurality of synchronous dynamic random access memory devices.

14. The system of claim 10 wherein said memory module includes a plurality of asynchronous Flash memory devices.

15. The system of claim 10 wherein said memory module includes both synchronous Flash memory devices and synchronous dynamic random access memory devices.

16. The system of claim 10 wherein said memory module includes both synchronous memory devices and asynchronous memory devices.

17. The system of claim 10 further comprising:

a second socket connector on said system board for receiving a second memory module wherein said second socket connector is coupled to said memory controller through said memory bus; and

a second memory module inserted in said second socket connector and electrically coupled to said memory controller wherein said second memory module includes a plurality of synchronous or asynchronous memory devices.

18. The system of claim 17 further comprising:

a jumper on said system board for configuring signals exchanged between said memory controller and said second memory module in accordance with the type of memory devices on said first memory module and on said second memory module.

19. The system of claim 17

wherein said first memory module provides serial presence detect information used in conjunction with said memory controller to identify the type of memory devices included on said first memory module, and

wherein said second memory module provides serial presence detect information used in conjunction with said memory controller to identify the type of memory devices included on said second memory module.

20. The system of claim 17

wherein said first memory module includes a plurality of synchronous dynamic random access memory devices, and

wherein said second memory module includes a plurality of asynchronous Flash memory devices.

21. The system of claim 17

wherein said first memory module includes a plurality of synchronous dynamic random access memory devices, and

wherein said second memory module includes a plurality of asynchronous static random access memory devices.

22. The system of claim 17

wherein said first memory module includes a plurality of asynchronous Flash memory devices, and

wherein said second memory module includes a plurality of asynchronous static random access memory devices.

23. A system comprising:

a system board;

a socket connector on said system board for receiving a memory module wherein said socket connector includes a key;

a memory module having a connector edge inserted in said socket connector and having an opposing edge opposite said connector edge wherein said memory module has a notch mated to said key when said memory module is inserted in said socket connector; and

a memory module retainer adapted to substantially immobilize said opposing edge with respect to rotation about said key.

24. The system of claim 23 wherein said memory module retainer comprises:

a nut affixed to said system board;

a hole in said memory module along said opposing edge and aligned with said nut; and

a screw inserted through said hole into said nut to substantially immobilize said opposing edge with respect to rotation about said key.

25. The system of claim 24 wherein said nut is a swaged extension nut.

26. The system of claim 23 wherein said memory module retainer comprises:

a half card-cage affixed to said system board wherein said half card-cage includes a channel for receiving said opposing edge of said memory module to substantially immobilize said opposing edge with respect to rotation about said key.

27. The system of claim 23 wherein said memory module retainer comprises:

a standoff pin affixed to said system board;

a hole in said memory module along said opposing edge and aligned with said pin wherein said standoff pin extends through said hole and locks when said memory module is completed inserted in said socket connector to substantially immobilize said opposing edge with respect to rotation about said key.

28. The system of claim 23 wherein said memory module retainer comprises:

a standoff pin affixed to said socket connector;

a hole in said memory module aligned with said standoff pin wherein said standoff pin extends through said hole and when said memory module is completed inserted in said socket connector to substantially immobilize said opposing edge with respect to rotation about said key.

29. A system comprising:

a system board;

a socket connector on said system board for receiving a memory module wherein said socket connector includes a key;

a memory module having a connector edge inserted in said socket connector and having an opposing edge opposite said connector edge wherein said memory module has a notch mated to said key when said memory module is inserted in said socket connector; and

memory module retainer means adapted to substantially immobilize said opposing edge with respect to rotation about said key.

30. The system of claim 29 wherein said memory module retainer means comprises:

nut means affixed to said system board;

a hole in said memory module along said opposing edge and aligned with said nut means; and

screw means inserted through said hole into said nut means to substantially immobilize said opposing edge with respect to rotation about said key.

31. The system of claim 30 wherein said nut means is a swaged extension hut.

32. The system of claim 29 wherein said memory module retainer means comprises:

card-cage means affixed to said system board wherein said card-cage means includes a channel for receiving said opposing edge of said memory module to substantially immobilize said opposing edge with respect to rotation about said key.

33. The system of claim 29 wherein said memory module retainer means comprises:

pin means affixed to said system board;

a hole in said memory module along said opposing edge and aligned with said pin means wherein said pin means extends through said hole and locks when said memory module is completed inserted in said socket connector to substantially immobilize said opposing edge with respect to rotation about said key.

34. The system of claim 29 wherein said memory module retainer means comprises:

pin means affixed to said socket connector;

a hole in said memory module aligned with said pin means wherein said pin means extends through said hole and when said memory module is completed inserted in said socket connector to substantially immobilize said opposing edge with respect to rotation about said key.

35. A memory module comprising:

a printed circuit assembly having connector pads at one edge of said assembly;

a plurality of memory devices mounted on said assembly and electrically coupled to said connector pads wherein said printed circuit assembly is adapted to support both synchronous and asynchronous types of said memory device, wherein said connector pads include;

a first select signal connector pad that selects a first subset of memory devices mounted on said module when a signal is applied thereto wherein said first subset of memory devices are synchronous memory devices; and

a second select signal connector pad that selects a second subset of memory devices mounted on said module when a signal is applied thereto wherein said second subset of memory devices are asynchronous memory devices.

36. A memory module comprising:

a printed circuit assembly having connector pads at one edge of said assembly;

a plurality of memory devices mounted on said assembly and electrically coupled to said connector pads wherein said printed circuit assembly is adapted to support both synchronous and asynchronous types of said memory device, wherein said connector pads include;

a first select signal connector pad that selects a first subset of memory devices mounted on said module when a signal is applied thereto wherein said first subset of memory devices are synchronous dynamic random access memory devices; and

a second select signal connector pad that selects a second subset of memory devices mounted on said module when a signal is applied thereto wherein said second subset of memory devices are synchronous Flash memory devices.