Process for forming pattern and method for producing liquid crystal apparatus employing process for forming pattern

• US 6,767,694 B2
• Filed: 02/25/2002
• Issued: 07/27/2004
• Est. Priority Date: 03/02/2001
• Status: Expired due to Term

• Current Assignee: Vista Peak Ventures LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: NEC LCD Technologies Limited (Tianma Microelectronics Company Limited)
• Inventors: Kido, Shusaku
• Primary Examiner(s): Duda, Kathleen
• Application Number:
  US10/084,848
• Publication Number:
  US 20020123241A1
• Time in Patent Office: 883 Days
• Field of Search: 430/311, 430/313, 430/314, 430/317
• US Class Current: 430/313
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136236 using a grey or half tone lithographic process
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G03F 7/095 having more than one photosensitive layer G03F7/075 takes precedence
• CPC Class Codes: H01L 21/0274 Photolithographic processes
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Abstract

A photosensitive film pattern formed through only one photolithography step and having difference in film thickness is formed utilizing difference in amount of light emitted to the photosensitive film on a film to be etched, and the film to be etched is etched two times to form plural patterns therein by utilizing the difference in film thickness of the photosensitive film pattern, thereby reducing the number of whole manufacturing process steps. In this case, at the time of etching and removing thin photosensitive film out of the photosensitive film pattern, the upper layer of thick photosensitive film out of the photosensitive film pattern has already been modified to a silica film nearly free from being affected by dry-etching, and therefore, the thick photosensitive film can maintain its planar shape nearly equal to that of the thick photosensitive film before etching the thin photosensitive film. Accordingly, the film to be etched is etched to have a pattern nearly equal to designed pattern by using the silica film as a mask.

Claims

1. A process for forming a pattern comprising:

a resist pattern formation step of coating a first resist film and a second resist film in order on a film to be etched on a substrate, and further, forming an initial resist pattern by patterning said first resist film and said second resist film to make coverage of said first resist film greater in size than said second resist film;

a first patterning step of etching said film to be etched to form a first pattern in said film to be etched by using said resist pattern as a mask; and

a resist etching step of etching said initial resist pattern to remove at least a portion of said first resist film, said portion being not covered by said the second resist film, to thereby form a remaining resist pattern consisting of said first resist film and said second resist film, said resist etching step further being constructed such that said second resist film is in a state of a resist film having higher resistance against dry-etching than that of said first resist film at least during said resist etching step.

2. The process for forming a pattern according to claim 1, wherein said initial resist pattern includes a first opening formed in said first resist film and a second opening formed in said second resist film in said resist pattern formation step, said first opening is formed inside said second opening, and said remaining resist pattern is formed to have an overhang of said second resist film with respect to said first resist film in said resist etching step.

3. The process for forming a pattern according to claim 1, wherein said second resist film is coated as a resist film having higher resistance against an etchant used in said resist etching step than that of said first resist film in said resist pattern formation step of coating said first resist film and said second resist film.

4. The process for forming a pattern according to claim 1, wherein said resist pattern is subjected to a plasma treatment step to modify said second resist film using a plasma treatment gas to change said second resist film into a modified resist film having higher resistance against dry-etching than that of said first resist film between said first patterning step and said resist etching step.

5. The process for forming a pattern according to claim 4, wherein said plasma treatment step employs one of a gas containing an O₂, a gas containing a fluorine series gas and a gas containing a mixture of an O₂ gas and a fluorine series gas, as said plasma treatment gas.

6. The process for forming a pattern according to claim 4, wherein said resist etching step is further constructed such that said second resist film is made to include silicon atoms to change said second resist film into a silicon-doped second resist film and then, said silicon-doped second resist film is modified to a silicon oxide film through said plasma treatment step using a mixed gas containing at least oxygen.

7. The process for forming a pattern according to claim 6, wherein said second resist film previously consists of a resist film capable of being silylated and between said first patterning step and said plasma treatment step, a silylating step of immersing said first resist film and said second resist film in a silylating agent containing silazane to silylate only said second resist film is carried out.

8. The process for forming a pattern according to claim 1, wherein said second resist film is modified to a modified resist film having higher resistance against dry-etching than that of said first resist film, while removing at least a portion of said first resist film, said portion being not covered by said second resist film, in said resist etching step.

9. The process for forming a pattern according to claim 1, wherein a second patterning step of etching said film to be etched to form a second pattern in said film to be etched is carried out by using said remaining resist pattern as a mask after said resist etching step.

10. The process for forming a pattern according to claim 1, wherein a gate wiring and a gate insulating film covering said gate wiring are formed on said substrate and under said film to be etched, said film to be etched is a laminated film formed by depositing a semiconductor film, a semiconductor film doped with impurities and a metal film for source/drain electrodes in order on said gate insulating film, and said resist pattern is formed on said laminated film.

11. The process for forming a pattern according to claim 10, wherein said resist pattern is formed such that a resist film out of said resist pattern, said resist film consisting of only said first resist film, is positioned above a later-formed channel region of a thin film transistor, at least said metal film for source/drain electrodes is etched and removed to form an electrode pattern made of said metal film for source/drain electrodes in said step of subjecting said film to be etched to said first patterning step by using said resist pattern as a mask, said resist pattern is etched to remove only said resist film consisting of only said first resist film to make said resist pattern become said remaining resist pattern in said resist etching step, and after said resist etching step, a second patterning step of etching and removing said metal film for source/drain electrodes, said semiconductor film doped with impurities and a part of said semiconductor film by using said remaining resist pattern as a mask to form a channel region of said thin film transistor in said laminated film is performed.

12. The process for forming a pattern according to claim 11, wherein a plasma treatment step of modifying remaining resist pattern said second resist film out of said resist pattern to a modified resist film having higher resistance against dry-etching than that of said first resist film is performed between said first patterning step and said resist etching step.

13. The process for forming a pattern according to claim 12, wherein said modified resist film is formed such that said second resist film is made to include silicon atoms to change said second resist film into a silicon-doped second resist film and then, said silicon-doped second resist film is modified to a silicon oxide film through said plasma treatment step performed using a mixed gas containing at least oxygen.

14. The process for forming a pattern according to claim 11, wherein said process for forming a pattern further comprises after said second patterning step:

a step of removing said remaining resist pattern used to form said channel region of said thin film transistor and subsequently, depositing a protective insulating film covering said gate insulating film;

a step of coating a third resist film and a fourth resist film in order on said protective insulating film and patterning said third resist film and said fourth resist film to make said third resist film broader than said fourth resist film while making said fourth resist film positioned on said third resist film to form a second resist pattern consisting of said third resist film and said fourth resist film, said second resist pattern having an opening therein;

a step of at least removing associated portion of said protective insulating film by using said second resist pattern as a mask to expose a surface of an electrically conductive layer consisting of said laminated film and positioned under said protective insulating film; and

a step of selectively etching said third resist film out of said second resist pattern to make an overhang of said fourth resist film with respect to said third resist film in said opening,

wherein said overhang is formed such that said fourth resist film is made to include silicon atoms to change said fourth resist film into a silicon-doped fourth resist film and then, said silicon-doped fourth resist film is modified to a silicon oxide film through a plasma treatment performed using a mixed gas containing at least oxygen, and thereafter, an associated part of said third resist film is removed in a lateral direction.

15. The process for forming a pattern according to claim 14, wherein an electrically conductive material is deposited on a surface consisting of said second resist pattern, said protective insulating film and said electrically conductive layer, and said second resist pattern is removed together with said electrically conductive material thereon to leave said electrically conductive material in and around said opening after forming said overhang.

16. The process for forming a pattern according to claim 10, wherein a common electrode is formed together with said gate wiring to have comb-shaped electrodes and in said resist pattern formation step, said resist pattern consisting of said first resist film and said second resist film is formed on said metal film for source/drain electrodes to cover a later-formed pixel electrode, said later-formed pixel electrode being interposed between said comb-shaped electrodes of said common electrode.

17. The process for forming a pattern according to claim 10, wherein said second resist film is coated as a resist film having higher resistance against an etchant used in said resist etching step than that of said first resist film in said resist pattern formation step.

18. The process for forming a pattern according to claim 1, wherein said initial resist pattern is formed such that said first resist film and said second resist film are exposed by using a reticle having a light-shielding portion and a translucent portion as a mask and then developed.

19. The process for forming a pattern according to claim 1, wherein said initial resist pattern includes a pair of isolated regions made of said second resist films such that said first resist film is exposed and extended between said pair of isolated regions.

20. The process for forming a pattern according to claim 1, wherein said initial resist pattern includes an overhang portion of said second resist film with respect to said first resist film in said resist etching step.