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Method for making a three-dimensional memory array incorporating serial chain diode stack

  • US 6,767,816 B2
  • Filed: 09/24/2002
  • Issued: 07/27/2004
  • Est. Priority Date: 04/28/2000
  • Status: Expired due to Term
First Claim
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1. A method for fabricating a multi-level memory array comprising, for each of at least two adjacent levels, the steps of:

  • depositing at least one metal layer;

    forming at least one layer of a first conductivity type organic polymer for both even-numbered levels and odd-numbered levels;

    masking and etching the polymer and metal layers to define a plurality of parallel, spaced-apart rail-stacks running in a first direction for even-numbered levels and running in a second direction for odd-numbered levels;

    filling space between the rail-stacks with a dielectric material;

    planarizing the polymer layer and the dielectric material to form a planarized surface, and forming another polymer layer having a variable resistance on the planarized surface.

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